These two tables describe the SM213 ISA. The first gives the general form for instructions in assembly and machine language and describes instruction semantics. ‘s’ and ‘d’ refer to source and destination register numbers while ‘p’ and ‘i’ to refer to compressed-offset and index values. Offsets in assembly use ‘o’, stored in machine code as ‘p’ such that ‘o’ is either 2 or 4 times ‘p’ as indicated in the semantics column. The second table gives an example of each instruction. With the exception of pc-relative branches and shift, all immediate values in instructions are unsigned.
Operation
load immediate load base+offset load indexed store base+offset store indexed halt
nop
rr move add
and
inc
inc addr dec
dec addr not
shift
branch
branch if equal branch if greater jump
get program counter jump indirect system call
Machine Language
Semantics / RTL
r[d] ← v
r[d] ← m[(o = p × 4) + r[s]]
r[d] ← m[r[s] + r[i] × 4]
m[(o = p × 4) + r[d]] ← r[s]
m[r[d] + r[i] × 4] ← r[s]
(stop execution)
(do nothing)
r[d] ← r[s]
r[d] ← r[d] + r[s]
r[d] ← r[d] & r[s]
r[d] ← r[d] + 1
r[d] ← r[d] + 4
r[d] ← r[d] − 1
r[d] ← r[d] − 4
r[d] ←∼ r[d]
r[d] ← r[d] << s
(if s is negative)
pc ← (a = pc + p × 2)
ifr[r]==0: pc←(a=pc+p×2) ifr[r]>0: pc←(a=pc+p×2) pc ← a
r[d]← pc+(o=2×p)
pc ← r[d]+(o = 2×p)
system call #n
Assembly
ld $v,rd
ld o(rs),rd
ld (rs,ri,4),rd st rs,o(rd)
st rs,(rd,ri,4) halt
nop
mov rs, rd
add rs, rd
and rs, rd
inc rd
inca rd
dec rd
deca rd
not rd
shl $s, rd
shr $-s, rd
br a
beq rr, a
bgt rr, a
ja
gpc $o, rd
j o(rd)
sys $n
0d–
1psd
2sid
3spd
4sdi
F000
FF00
60sd
61sd
62sd
63-d
64-d
65-d
66-d
67-d
7dss
8-pp
9rpp
Arpp
B—
6Fpd
Cdpp
F1nn
vvvvvvvv
aaaaaaaa
Operation
load immediate load base+offset load indexed store base+offset store indexed halt
nop
rr move add
and
inc
inc addr dec
dec addr not
shift
branch
branch if equal
branch if greater
jump
get program counter
jump indirect
syscall read(r0=0, r1=buffer, r2=size) syscall write(r0=1, r1=buffer, r2=size) syscall exec(r0=buffer, r1=size)
Machine Language Example
0100 00001000
1123
2123
3123
4123
f000
ff00
6012
6112
6212
6301
6401
6501
6601
6701
7102
71fe
1000: 8003
1000: 9103
1000: a103
b000 00001000
6f31
c104
f100
f101
f102
Assembly Language Example
ld $0x1000,r1
ld 4(r2),r3
ld (r1,r2,4),r3
st r1,8(r3)
st r1,(r2,r3,4)
halt
nop
mov r1, r2
add r1, r2
and r1, r2
inc r1
inca r1
dec r1
deca r1
not r1
shl $2, r1
shr $2, r1
br 0x1008
beq r1, 0x1008
bgt r1, 0x1008
j 0x1000
gpc $6, r1
j 8(r1)
sys $0
sys $1
sys $2