CS计算机代考程序代写 CS 2204: Digital Circuits

CS 2204: Digital Circuits

Lecture 16

Initializing flip-flop values
We will use an extra “Resetn” input. A zero value of Resetn
input causes the flip-flops output Q to reset to 0
immediately (no waiting for posedge of clock!) This is
called an “asynchronous” reset

CLK

Resetn

Implement 2-bit up-counter in verilog
module 2bupcount (clk, resetn, Q)

input clk, resetn;

Output reg [1:0] Q;

Reg [1:0] S;

always @(Q)

S = Q+1;

always @(negedge resetn, posedge clk) begin

if(!resetn)

Q <=0; else Q <= S; end endmodule Combinational logic Sequential logic Finite state machines We will now discuss a general method to design sequential circuits from a “specification” Example: Car speed-limiter w = 0 if below_limit, 1 if above limit. Speed limiter z = 0 no break, 1 apply break. Apply break if car exceeds speed-limit for two consecutive intervals Assumptions We will assume that the entire system operates on a periodic clock. All inputs (w) and outputs (z) are expected to change immediately (or just) after a positive clock edge. Design process Step 1: Define the “state” of the system, i.e., what should I “remember” to make correct decisions. In this example: How many “w=1”s do I have to see before I apply the breaks? Two One Apply_Break State transitions Two One Apply_Break START w=1 w=1 Step 2: Define transitions between states. For each state, what is the next state for all possible values of inputs? Exercise: complete this state transition diagram State transitions Two One Apply_Break START w=1 w=1 Step 2: Define transitions between states. For each state, what is the next state for all possible values of inputs? w=1 w=0 w=0 w=0 OUtputs Two/ z=0 One/ z=0 Apply_Break/ z=1 START w=1 w=1 Step 3: What should the output be for each state? w=1 w=0 w=0 w=0 Next state and output table Two One Apply_Brake Apply_Brake Apply_Brake OneTwo Two Two State Assignment Assign a unique combination of bits to each state - The bit assignment can be anything you want. But we will see later that some assignments are better than others. - Let y1 and y2 be the state bits How many bits of state do we need? Next state table after state assignment Two One Apply_Brake Dont care Outputs of flip-flops correspond to “current state” Outputs of flip-flops correspond to “current state” Next state as a function of current state/input Output as a function of current state NOTE: but NOT input w. When the output is only a function of the current state, we call it a “moore” machine. Next-state Output Final implementation Resetn input initializ es FFs to 0,0 state Timing diagram