UART
Interrupts
Christopher Mar
Polling
Waiting, using a loop, for an I/O device status to change to a specific condition
Exit loop when condition is met
Pros
Simple to Implement
Easy to debug
Cons
Program cannot do anything else while polling
Busy waiting loop
Not a problem in Project 3 since nothing to needed to be done until all characters were received
Polling
Interrupt
Signal to the processor that something needs to be attended to
Implementation similar to an event handler
Events are typically software triggers, interrupts are hardware triggers
Interrupt Terminology
Interrupt Service Routine (ISR)
AKA Interrupt handler
Section of code that is run when an interrupt occurs
Interrupt Terminology
Interrupt Vector
Points to the location of the ISR
Initialized by loading the address of ISR label into register $iv :
li $iv, my_isr_label
Interrupt Terminology
Interrupt Return Address ($ir)
Location in program immediately after the last instruction executed before the interrupt
Set automatically when an interrupt is triggered
Similar to how $ra is set after a jump-and-link instruction
Interrupt Terminology
Temporary interrupt registers
$i0 and $i1
For use inside ISR
Interrupt Process
Program Instructions
ISR
Interrupt Occurs
$iv
$ir
$ir set to next instruction
Jump to address in $iv
Jump to $ir
Pros
Only handles I/O when ready
Cons
Instructions are not executed sequentially
Current state of registers is unknown
Current state of program is unknown
Can be harder to debug
Interrupts
PLP Interrupt Controller Registers
Mask (0xf0700000)
Used to allow specific devices to trigger interrupts
Status (0xf0700004)
Indicates which device(s) triggered an interrupt
Interrupt Mask Register
Writing a 1 to the a bit position enables the corresponding device to trigger interrupts
Bit Description
31-4 Reserved
3 Button Interrupt
2 UART Interrupt
1 Timer Interrupt
0 Global Interrupt Enable
Interrupt Status Register
Unlike the UART status register, the interrupt status register can be written to.
Bit Interrupt Reason
31-4 Reserved (Always 0)
3 Button Interrupt
2 UART Interrupt
1 Timer Interrupt
0 Always 1
Interrupt Status Register
The value read from the status register can be used to determine what interrupts have occurred
Only timer interrupts should be set for Project 4 so no check needs to be made
Write a value containing zeros in all positions that have been cleared
In the case of Project 4, either a 0 or 1 will work
(bit 0 is always 1)
Returning From ISR
Interrupts need to be enabled in the branch delay slot of the jump to the interrupt return address
jr $ir
sw $i0, 0($s1) # $s1: Interrupt Controller
Timer
Timer
Address: 0xf0600000
Increases by one with each CPU cycle
Can be both written to and read from
Generates interrupt upon overflow
Value exceeds largest 32 bit number: 0xffffffff
Save and Restore
If your ISR uses registers that are also used by the existing program you can do one of two things:
Use push and pop
Push the old value of these registers onto the stack at the start of the ISR
Pop them back before returning
Use save and restore
The save pseudo-op pushes the same registers onto the stack as call
The restore pseudo-op pops these values and restores them to registers
Project 4 Pre Quiz and
Demonstration
19