02 Computer Evolution and Performance
COMP228: System Hardware
Tutorial # Ch06: Cache Memory
Levels of the Memory Hierarchy
CPU Registers
100s Bytes
<10s ns
Cache
K Bytes
10-100 ns
1-0.1 cents/bit
Main Memory
M Bytes
200ns- 500ns
$.0001-.00001 cents /bit
Disk
G Bytes, 10 ms
(10,000,000 ns)
10 - 10 cents/bit
-5 -6
Capacity Access
Time Cost
Tape
infinite
sec-min
10 -8
Registers
Cache
Memory
Disk
Tape
Instr. Operands
Blocks
Pages
Files
Staging
Xfer Unit
prog./compiler
1-8 bytes
cache cntl
8-128 bytes
OS
512-4K bytes
user/operator
Mbytes
Upper Level
Lower Level
faster
Larger
Locality
Locality
Exercise 1
Exercise 2
Exercise 3
Exercise 4
Exercise 5
Exercise 6
Exercise 7
Exercise 8
Exercise 8
Exercise 9
Exercise 10
Exercise 11
Exercise 11
Exercise 11
Exercise 11
Exercise 12
0
1
2
3
4
5
6
7
1
--
0
3
--
--
2
--
Exercise 13
Exercise 13
Exercise 14
Exercise 14
25
• Even if we had no page faults, the EAT would be
400ns because memory is always read twice: First to
access the page table, and second to load the page
from memory.
• Because page tables are read constantly, it makes
sense to keep them in a special cache called a
translation look-aside buffer (TLB).
• TLBs are a special associative cache that stores the
mapping of virtual pages to physical pages.
The next slide shows address lookup
steps when a TLB is involved.
6.5 Virtual Memory
26
1. Extract the page number from
the virtual address.
2. Extract the offset from the virtual address.
3. Search for the virtual page number in the
TLB.
4. If the (virtual page #, page frame #) pair is
found in the TLB, add the offset to the
physical frame number and access the
memory location.
5. If there is a TLB miss, go to the page table
to get the necessary frame number.
If the page is in memory, use the
corresponding frame number and add the
offset to yield the physical address.
6. If the page is not in main memory, generate
a page fault and restart the access when the
page fault is complete.
TLB lookup process
27
6.5 Virtual Memory
Putting it all together:
The TLB, Page Table,
and Main Memory
Exercise 14
Exercise 14
Chapter 7
Exercise 1
Exercise 2
Exercise 3
Exercise 4
Exercise 4