COMP 228 Review
Summer 2021
Chapter 1: Introduction
• CPUs use Very Large-Scale Integrated circuits.
o Integrated circuits are built with many of transistors.
o Transistors replaced vacuum tubes and relays.
o Vacuum tubes and relays used electricity to replace mechanical computation devices.
o Moore’s Law states the transistor count doubles over time.
• Von Neumann Computers have three components.
o A CPU to perform instructions.
o Main Memory to storage instructions and data
o An I/O System to get data in and out of the computer.
• SI prefixes are used, base-2 versions exist.
o Units: Time in seconds, Periodicity in Hertz, Size it meters
Chapter 2: Data Representation
• Different number systems exist, we are used to base-10 numbers.
• A bit is the smallest unit of storage (exists as 0 or 1)
o A byte is made up of 8 bits.
o A word is a grouping of bits such as 8, 16, 32, or 64 bits.
o A bit can be used to represent a binary digit.
• As part of a larger structure
o Signed integers such as two’s compliment.
o Floating point numbers (IEEE-754)
o Encode text such as ASCII.
• Error detection systems
o Parity, Checksums, CRCs
• Error correction systems
o Multidimensional parity check
o Hamming Codes
Chapter 3A: Digital Logic
• Digital Logic circuits behaves like a function.
o A set of inputs are calculated into an output.
• Boolean Algebra is the math that maps to Digital Logic
o Boolean operators map to Logic Gates
o Boolean Algebra has identities such as DeMorgan’s Law
• Truth Tables represent how a Digital Logic circuit works.
o Boolean expressions can represent a truth table.
• Logic Gates are built with transistors.
o AND, OR, NOT, NAND, NOR XOR
• Karnaugh Maps are a useful tool for finding expressions.
Chapter 3B: Digital Components
• Combinational Circuits
o Half Adder, Full Adder, n-bit Adder
o Decoder, Multiplexer
o The ALU (Arithmetic Logic Unit) is a highly composed combinational circuit.
• Sequential Circuits
o Flip-flops (SR, D), Registers
o Clocked Flip-flops (SR, JK, D)
o A register is a highly composed sequential circuit.
Chapter 4A: Architecture
• The CPU has a data path which holds and moves data.
o Registers to store data or state.
▪ Program Counter / Instruction Pointer (PC)
▪ Instruction Register (IR)
▪ Processor Flags
▪ Main Memory Address Bus and Data Bus Registers (MAR, MBR)
o The ALU to perform arithmetic and logical operations.
o One or more busses that connect everything.
• The CPU has a control unit which orchestrates the flow of data between data path components.
• The control unit is a giant combinational circuit.
o Inputs: Timing signals, IR, Processor Flags
o Outputs: Control signals to each component on the data path
Chapter 4B: Architecture
• Buses connect components together.
• Clock signals coordinate actions in the CPU
• Main Memory consists of a bank of memory chips.
o Interleaving increases address space
o Attaching in parallel increases word size
• Assembly Language is a programming language.
o Maps mnemonic instructions to machine code
• Register Transfer Language is a notation.
o Describes the actions of the control unit.
o Describes the flow of data on the data path.
• Fetch-Decode-Execute Cycle
• There are two architecture families: RISC, CISC
Chapter 5: Instruction Sets
• Instructions can exist in many formats.
o They are a design decision.
o Length can be fixed or variable.
• An CPU can be either Little-Endian or Big-Endian
• Machine code must encode everything about an instruction.
o Operation (Load, Store, Add, Jump, Condition-Branch, etc…)
o Operands (Memory-Memory, Register-Memory, Load-Store)
o Addressing Modes (Immediate, Direct, Indirect, Indexed)
• Stack, Accumulator, General Purpose Register
o Postfix notation is helpful in representing code in Stack ISAs
• Finite encodings for fixed length instructions
• Pipelining allows different execution phases of different instructions to happen at the same time.
Chapter 6: Memory
• Static RAM, Dynamic RAM, EEPROM, Flash Memory
• The Memory Hierarchy
o Fast memory is expensive, larger memory is slow.
• Cache Memory
o Designed around Temporal and Spatial Locality
o Hit rate / Miss rate.
o Direct Mapped, Fully Associative, Set-Associative
o Replacement Policy
▪ LRU, FIFO
o Writeback vs. Writethrough
• Virtual Memory
o Maps Virtual addresses to Physical Addresses
o Paged vs. Segmented
o Fragmentation
Chapter 7A: Input/Output
• Slow I/O devices slow down everything that depends on them.
o Programmed I/O is the slowed form of I/O
• I/O Devices appear as memory to the CPU (memory mapped I/O)
o Connect to the same bus as main memory.
• I/O Devices can fire “interrupts” to signal that they need attention.
o Interrupts cause an ISR to stop the running program for attention.
• I/O Devices can act as a bridge to different types of busses.
o Many peripherals connect to an I/O device called a controller.
• DMA (Direct Memory Access) controller
o I/O device that offloads memory transfer operations from the CPU.
o Can also take over the bus connected to main memory.
• Devices can be character or block devices.
• Serial and Parallel data transmission
Chapter 7B: Storage
• Storage Types
o Magnetic: Hard Drives and Tape Drives (LTO)
o Optical: CD, DVD, Blu-Ray
• Hard drive structure
o Surfaces, Heads, Tracks, Blocks
o Average access latency (seek time + rotational delay)
• RAID Arrays
o 0 Striping (All drives are used for storage)
o 1 Mirroring (All drives are the same)
o 5 Distributed Parity (One backup parity drive)
o 6 Dual Distributed Parity (Two backup parity drives)
• Compression
o Entropy as a metric for data density
o Lossless: Statistical Coding, Dictionary Coding (Lempel-Ziv)
o Lossy: Uses signal processing to remove imperceivable data
Chapter 8: System Software
• Operating Systems
o From Monitor to BIOS to CLI to GUI
o Microkernel vs Monolithic Kernel
o Multiprogramming and Timesharing
o Protected Environments
▪ Process Management and Scheduling
▪ Operating System controls Virtual Memory
• Programming Tools
o Compilers
o Assemblers (Absolute code vs. Relative or Relocatable code)
o Linkers (Static Compile-time Linking, Dynamic Run-time Binding)
o Interpreters
• Database Software
o ACID properties
Chapter 12: Network Organization
• Networks are used as a means to connect computers together.
o Classified by distance connected: PAN, LAN, MAN, WAN.
• Different cables have different properties.
o Signal to Noise Ratio (SNR) is the measure of signal quality.
• There are 7 Layers to the OSI model.
o Physical: Wires that connect devices
o Data Link: Data signals that travel over wires as packets.
o Network: System to relay packets between networks
o Transport: Assembles packets into “conversations”
o Session: Maintains a history of “conversations”
o Presentation: Abstracts the session to software
o Application: End user application
Chapter 1: Introduction
Chapter 2: Data Representation
Chapter 3A: Digital Logic
Chapter 3B: Digital Components
Chapter 4A: Architecture
Chapter 4B: Architecture
Chapter 5: Instruction Sets
Chapter 6: Memory
Chapter 7A: Input/Output
Chapter 7B: Storage
Chapter 8: System Software
Chapter 12: Network Organization