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Homework 3
Q1 Incomplete Datapath
22 Points
Consider the minimal datapath shown above. In order to execute the
SKPGT (skip if greater than) instruction (with the same syntax as the
instruction on the LC-902) on the datapath, there must be changes
made to the datapath. (Assume the microcontroller is fully developed
and can accept any changes you make appropriately.)
Q1.1 Datapath Modification(s)
6 Points
What is the minimal number of component(s) that must be modified?
List them below and include:
How are you modifying the component(s)?
Why do we need the modification(s)?
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Q1.2 Datapath Addition(s)
16 Points
What is the minimal number of component(s) that must be added? List
them below and include:
Where on the datapath would you put the component(s)?
Why do we need to add the component(s)?
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Q2 Datapath Tracing
28 Points
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The above is the datapath of the LC-4000, a modified version of LC-
2200. Notice the extra MUX in the south of the “A” register, another
extra MUX north of the PC, and a wire connecting the ALU output to
the new PC mux.
Q2.1 FETCH microcode
8 Points
Write out the microstates for an efficient FETCH instruction that makes
use of the modifications on the LC-4000 datapath. This FETCH
instruction accomplishes the same goals i.e., fetches an instruction
from memory at the address pointed to by
the Program Counter (PC) into the Instruction Register (IR); it
subsequently increments
the PC in readiness for fetching the next instruction.
For each microstate, write the control signals used. Signals irrelevant
to the state can be omitted and will be assumed to be zero. You will
lose points for an inefficient answer! An example answer can be
found below. Note the use of RegSel instead of regno!
Example: ADD instruction
ADD0: DrREG, LdA, RegSel=01
ADD1: DrREG, LdB, RegSel=10
ADD2: DrALU, WrReg, func=00, RegSel=00
Enter your microstates of the FETCH instruction for the LC-4000
below:
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Q2.2 SKPEQ microcode
20 Points
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Write out the microstates for an efficient SKPEQ instruction that makes
use of the modifications on the LC-4000 datapath. For each
microstate, write the control signals used. Signals irrelevant to the
state can be omitted and will be assumed to be zero. You will lose
points for an inefficient answer!
You should write out the full logic for SKPEQ ; this means including
the microstates for when a branch is taken. You should assume that
asserting ChkCmp at the correct time will select the correct next state
for the branch; and you should assume that the branch is taken in
order to write out the full logic for SKPEQ.
Enter your microstates of the SKPEQ instruction for the LC-4000
below:
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Q3 Datapath Design
28 Points
In datapath design, two common approaches are to use a single-bus
or a two-bus design.
Q3.1 LC 2200 Bus
4 Points
What type of bus architecture does the LC-2200 have?
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Single-Bus
Two-Bus
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Q3.2 Single Bus Pros and Cons
12 Points
Describe one benefit of having a single-bus design AND one
drawback of having a single-bus design.
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Q3.3 Two Bus Pros and Cons
12 Points
Describe one benefit of having a two-bus design AND one drawback
of having a two-bus design.
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Q4 Microcontroller Design
22 Points
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Consider the Flat ROM from the LC-2200 microcontroller. The Z-bit is
equivalent to CmpOut in the LC-902 (i.e. it tells the microcontroller
whether or not to branch).
The bit layout of the input to the rom looks like this:
MSB | — 4 bit OP — | — 1 bit Z — | — 5 bit State — | LSB
Q4.1 Fetch microstates
4 Points
How many copies of the fetch microstates exist in this ROM for the LC-
2200 ISA? Assume that the Z register is set to 0 when the BEQ
instruction is taken.
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Q4.2 LW microstates
6 Points
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Assuming fetch takes 3 microstates and the generic address of the
fetch1 microstate is 00000, what address of the ROM is LW1 stored in?
Please enter the answer as a 10-bit binary number with no prefix, i.e.
1010101010
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Q4.3 Drawbacks to Flat ROM Design
8 Points
Briefly identify a drawback to using a Flat ROM design.
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Q4.4 Minimum bitsize of Next State Register
4 Points
Assume the following:
Fetch takes 3 microstates
Any individual instruction, except for BEQ, takes at most 4
microstates
The first half of branch takes 3 microstates
The second half of branch takes 3 microstates (for a total of 6
branch microstates)
What is the smallest acceptable size of the Next State register in bits?
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