CSE 371 Computer Organization and Design
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Computer Organization and Design
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Unit 12: Virtual Memory
Slides developed by , , & C.J. Taylor
at the University of Pennsylvania
with sources that included University of Wisconsin slides
by , , , and .
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
This Unit: Virtual Memory
The operating system (OS)
A super-application
Hardware support for an OS
Virtual memory
Page tables and address translation
TLBs and memory hierarchy issues
System software
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Virtual Memory: 5.4
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
A Computer System: Hardware
CPUs and memories
Connected by memory bus
I/O peripherals: storage, input, display, network, …
With separate or built-in DMA
Connected by system bus (which is connected to memory bus)
System (I/O) bus
Memory bus
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
A Computer System: + App Software
Application process: the work we want to do
everything else is in support of this
System (I/O) bus
Memory bus
Application process
Simple situation – One application running on the computer. Maybe an API to help it access I/O but this single process is the master.
Still the case in many embedded applications.
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
A Computer System: + OS
System (I/O) bus
Memory bus
Application process
From what we’ve talked about so far, we can support a model with one application.
However, we need to be able to multitask and run more than one application on the system.
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
A Computer System: + OS
System (I/O) bus
Memory bus
We’ve just looked at the mechanism, precise interrupts, that allows us to enable switching from one application to another seamlessly.
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
A Computer System: + OS
Operating System (OS): virtualizes hardware for processes
Abstraction: provides services (e.g., threads, files, etc.)
Simplifies application programming model, raw hardware is nasty
Isolation: gives each process illusion of private CPU, memory, I/O
Simplifies application programming model
Increases hardware resource utilization
System (I/O) bus
Memory bus
“Virtualizing” a resource
To virtualize a resource is to make a finite amount of a resource act like a very large/infinite amount.
Easier to write programs with a virtualized interface
Resources we can virtualize:
processors (via multitasking)
DRAM (via virtual memory)
entire machine+OS (via virtual machines)
Key question: how do you manage state?
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Multitasking: virtualizing a processor
When multiple applications are being run on the same core, the OS shares the computer between them
Multitasking dates back to the early days of computers when systems were expensive and we needed to be able to support multiple users concurrently.
The OS needs to be able to switch between different processes. In most cases it does this so quickly that users/processes don’t realize the machine is being shared.
The act of switching between processes is referred to as a context switch
what state is involved?
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
state == registers
When do we perform a context switch?
Hardware timer ensures each process gets fair access to the CPU
When do we switch?
when the timer goes off (e.g., every 2ms)
At system calls because they are usually slow
we want to do something else useful in the meantime, so switch to another process and run it instead
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Preemptive multi-tasking vs cooperative multi-tasking.
A variety of strategies – prioritization dealt with in CIS 380.
Virtualizing Memory
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Virtualizing Main Memory
How do multiple procs (and the OS) share main memory?
Goal: each application thinks it has all of the memory
One process may want more memory than is in the system
Process insn/data footprint may be larger than main memory
Requires main memory to act like a cache
With disk as next level in memory hierarchy (slow)
Write-back, write-allocate, large blocks or “pages”
No notion of “program not fitting” in registers or caches (why?)
Part #1: treat memory as a “cache”
Store the overflowed blocks in “swap” space on disk
Part #2: add a level of indirection (address translation)
Approach 1. Each application is aware of the portion of memory that it is supposed to use and it is supposed to be a good citizen and only use that piece.
Basic rule – be nice.
This doesn’t work so good other applications can run roughshod over memory. It only takes one bad actor to bring down the whole system.
Approach 2. Virtual memory – The OS is responsible for providing each application with the illusion that it has its own address space and it can do whatever it wants with that space.
This is a cute trick and it protects applications from each other.
Virtual machines. Instead of just virtualizing the memory we virtualize the entire machine.
In order to provide this memory abstraction we need hardware support. Every process thatn
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Virtual Memory (VM)
Virtual Memory (VM):
Level of indirection
Application generated addresses are virtual addresses (VAs)
Each process thinks it has its own 2N bytes of address space
Memory accessed using physical addresses (PAs)
VAs translated to PAs at coarse (page) granularity
OS controls VA to PA mapping for itself and all other processes
Logically: translation performed before every insn fetch, load, store
Physically: hardware acceleration removes translation overhead
PAs (physical memory)
OS controlled VAPA mappings
Under the hood – address space that each process wants to use is broken up into pages – chunks. The chunks are allocated on disk and brought into memory as needed.
Note that every process doesn’t use the whole address space or we would be screwed. With 32-bits its not that bad – each address is 4 GB and we could allocate a few these days but with 64-bits this would be a real problem.
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
Virtual Memory (VM)
Programs use virtual addresses (VA)
VA size (N) aka pointer size (these days, 64 bits)
Memory uses physical addresses (PA)
PA size (M) typically M
Update page tables, flush TLBs, retry memory access
Spend a lot of time on replacement strategy here because page table miss is so painful. – Thousands of clock cycles.
The life of a virtual memory access
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
physical address
access L1$
access L2$
fill line to L1$
access memory
not shown: access protection checks, store buffer, evictions/write-backs, victim buffer, write-back buffer
CIS 371: Comp. Org. & Design | Dr. | Virtual Memory
What happens on a Context Switch
Operating system responsible for handling context switching
Hardware support is just a timer interrupt
Each process has an associated data structure which is used to record relevant state such as:
Architected state
PC, registers, Page table pointer
Saved to, restored from physical memory
Memory state? Use virtual memory
Non-architected state: caches, predictor tables, etc.
Ignore or flush
ignoring is key aspect of Spectre/Meltdown vulnerabilities!
OS swaps out values for old process, swaps in values for new process, and lets new process run
Putting a process into a deep freeze.
Context switches are handled like interrupts / exceptions by the
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