Description
In this assignment we will be introducing register-register operations. To do this without needing more register fields in our instructions, we will use an accumulator-based design
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. Think of the “accumulator” as a special register we keep outside of the register file for easier access and use implicitly. We will use these new register-register operations to generate the Fibonacci sequence.
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To generate the sequence we really only need 4 instructions:
i) one that puts the sum of a register and an immediate in the accumulator [note: we
almost have this already].
ii) one that puts the sum of a register and the accumulator in the accumulator. iii) one that stores the accumulator in a register.
iv) a programmable jump instruction [we already have this]
Outline Steps
1) Add a single 8-bit register to your main circuit. This will be our accumulator
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2) Disconnect the immediate portion of the instruction from the ALU (remember: that’s the adder we introduced last assignment). Then with the help of a 2-way multiplexer, make that input to the ALU selectable between the immediate and the accumulator output. We now have the ability to do register-accumulator adds, as well as register-immediate adds. (but how do we control that multiplexer?)
3) Disconnect the output of the ALU from the input to the register file, and instead connect it to the input to the accumulator. Connect the accumulator output to the input of the register file. (What have we just done here?)
4) Main design task: Complete the decode logic. Use the decoder outputs to control remaining select pins in a way that will implement the new instructions mentioned above. You can decode opcodes to instructions as you choose (see example below), as long as you use them correctly in your instruction code.
5) Add hex displays to the upper and lower nibbles of your accumulator output (so we can see value).
6) Finally program the instruction ram with a loop that produces the Fibonacci sequence at the accumulator output display.
Example for completing the control logic. Assuming decoder outputs 3, 4 and 5 respectively represent the new instructions (i), (ii), and (iii) from above (and that output 1 is already used for TTY, and output 2 for jump operations)
a. The select pin of the 2-way multiplexer at ALU input This is the multiplexer we just introduced (it choses immediate or accumulator as an input to the ALU). This matters only to instructions (i) and (ii). So you could just use decoder output 3 to select the “immediate” as ALU input.
b. The accumulator load enable. Instructions (i) and (ii) both need to control this pin (as they both store to the accumulator) So you could connect it to the OR of decoder outputs 3 and 4.
c. The register file “store” enable. (remember: in last assignment this was connected to decoder output 3, as that opcode was the only instruction that stored to the register file — but we’ve changed that now in step 3 above). This pin now only needs to be activated on instructions (iii), which stores the accumulator to the register file. So you could simply connect it to decoder output 5.
I will open your circuit submission, load the instruction ram with your image file. When I enable clock I should see the Fibonacci sequence generated on the hex displays of the accumulator (we’re not using the TTY this time). And no — you can’t just load the Fibonacci sequence to the accumulator with immeidates :). I must see the last and current numbers stored in the register file, and the loop properly executing.
Code Hints
a) it really needs no more than 6 instructions to generate the sequence. b) we only really need to use 3 of the register file entries. One to store the current number, one for the prior number, and possibly one reserved for zero. c) we will be assuming the register file starts with all entries cleared to zero.
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