Draw the combinational logic diagram for the following Control Signal CS1:
CS1= (((AANDB)ORC)ANDD)OR(CORE)
Your diagram should directly implement the above expression (do not reorganize/optimize the expression), using the AND and OR gate symbols:
Not suitable for online tests so adjustments will be made, e.g. analyzing combinational logic diagrams and calculating the output values, etc.
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A question with a circuit diagram could appear as below:
Make sure that the zoom factor of your browser is properly set so that you can see the diagram clearly. Note that you may need to use the scrollbar to see the text of the question. Different notations may be used, e.g. in the above question “!=“ is used to denote non-equality.
ABCF 0000 0010 0100 0110 1000 1010 1100 1111
ABCF ABCF 1010 0010CORRECT
ABCF ABCF 1111 1100WRONG
One can easily spot, however that F=0 if B=0 or C=0 so the correct answer F(A=1,B=0,C=1)=F(A=0,B=0,C=1) becomes obvious with no need to derive the truth table.
You are expected to analyze the shown circuit diagram and derive the output values necessary for determining the correct answer.
A “brute force” approach that always works would be, for example, to derive the truth table corresponding to the given circuit diagram as shown on the right.
ABCF ABCF 0110 1000WRONG
Using Drag&Drop to Construct a Circuit Diagram
Drag a gate from one of the rows in the bottom, then drop it to its matching position on the circuit diagram. Only one gate per row can be used. The row matching is from top to bottom.
Using Drag&Drop to Construct a Circuit Diagram
Additional examples of possible graphical arrangements. Note the multiplexor in the middle of the bottom row on the right. The bus connected to its top carries the control signals.
A Sample Drag&Drop Question
This question can be addressed by constructing the desired circuit diagram as a ProductOfSums (POS).
Note, however, that following the principle of duality we can actually use the approach explained in the construction of a circuit diagram as a SumOfProducts (SOP) so there are no new things to remember in this case.
A Sample Drag&Drop Solution
Note how we have used in our solution the rows in the Boolean table that correspond to the values of F=0.
C. Stuck at 0
A. Stuck at 1
Single-cycle CPU
B. Stuck at 0
For the CPU shown on the previous slide, consider the cases when a bus is modified as denoted in the bubbles. For each one:
• Describe in words the negative consequence of this bus modification relative to the working, unmodified CPU.
• Provide a snippet of code that will fail
• Provide a snippet of code that will still work
Not suitable for online tests so adjustments will be made. e.g. multiple choice and short answer questions instead of textual descriptions.
Label A. Branches will always be taken. Example of code that fails:
bne x0, x0, exit
Code that will still work:
beq x0, x0, exit
Label C. Cannot write a value different from 0 to register file. This means that R-type and any instruction that write back to a register a value
different from 0 will fail.
An example of code snippet that will fail is: addi x5, x0, 1
An example of a code snippet that will still work is:
sd x5, 0(x6)
Single-cycle CPU
For the CPU shown on the previous slide, assume that s1=16, t1=32, and PC=8, and address 8 contains the instruction: add t2, s1, t1.
For each bubble label, determine the stable value (in decimal) of the bus at the end of the execution cycle of the above instruction. Write that value in the space below and explain how you obtained it.
Label A: 0; The value is 0 because add is not a branch instruction Label B: 0; The value is 0 because add does not write data to RAM
Label C: 16; This is the value in rs1 (source register 1) which is s1 in the above add instruction
Label D: ???
Label E: 0; The value is 0 because ???
Label F:48; This is the value to be written to t2 (the sum of the values in s1 and t1 which is 16+32=48)
Not suitable for online tests so adjustments will be made. e.g. numerical entries and short answers instead of textual explanations.
For the CPU shown on the previous slide, assume that s1=16, t1=32, andPC=8,andaddress8containstheinstruction:sd s1,8(t1).
Fore each bubble label, determine the stable value (in decimal) of the bus at the end of the execution cycle of the above instruction. Write that value in the space below and explain how you obtained it.
Label A: 0; The value is 0 because ???
Label B: 0; The value is 1 because sd writes data to RAM
Label C: ???
Label D: 40; This is the sum of the value in t1 and the immediate value
8 in the sd instruction which is 32+8=40 Label E: 0; The value is 0 because ??? Label F:40; This is ???
26 (for R-type the funct7 and rs2 bits are processed as an imm) 0 (R-type does not access DM)
0 (the result of the or is not 0)
Single-cycle CPU
For the CPU shown on the previous slide, assume that the latencies of the major components are as follows (the latency of any other
component is negligible): Two-to-One Mux
PC+4 Adder Register File Write Register File Read Branch ALU
Main ALU Instruction Memory Data Memory Read Data Memory Write
1 ns 2 ns 1 ns 6 ns 8 ns 10 ns 12 ns 20 ns 2 ns
Note that the register file can read two registers simultaneously within the stated latency. Note also that some components are used in parallel with others so they may not affect the critical path of an instruction.
Different instructions have different execution times and the following questions ask you to compute these times.
Write the execution time of lw in ns and show how your computed it: InstrMem+RegR+mALU+DataMemR+Mux+RegW
ld: 12+6+10+20+1+1 = 50
Write the execution time of add in ns and show how your computed it: InstrMem+RegR+Mux+mALU+Mux+RegW
sub: ??? = 31
Write the execution time of sw in ns and show how your computed it: ???
sd: ??? = ???
Write the execution time of bne in ns and show how your computed it: ???
bne: ??? = ???
Write the maximum clock rate in MHz and show how your computed it:
Rate = 1/ld = 1/50ns = 1/0.000000050s = (1000/50)*1000000 = 20*1000000Hz= 20 MHz
Not suitable for online tests so adjustments will be made. e.g. numerical entries without showing your calculations, etc.
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