Main Title Slide
Sensing Systems and Signal Processing
Dr Richard
Copyright By PowCoder代写 加微信 powcoder
Data Acquisition
Recording signals
DAQ – Data Acquisition
Not going to go into how they work that is beyond the scope of this module and was covered in Yr 2, but they do have specifications that we care about if we wish to interface to them.
Input range – signal range required, might be programmable, or fixed. +/-1V +/-5V etc.
Bit depth – how many bits are used to represent the signal, 8,12,16 bits etc.
Sample rate – what the sampling frequency range is , 100K, 1M Sa/s
Input impedance – low or high input impedance, typically 50Ohm or High Z.
Dynamic range – essentially the number of bits and the full scale
EEEE3089 2021-2022
Input range –do we need to amplify or attenuate the signal?
Bit depth – is there sufficient resolution for the signal we are interest in recording?
Sample rate – does this allow us to capture the bandwidth needed?
Input impedance – can we connect directly or do we need a matching circuit / buffer?
Dynamic range – can we capture the data we want?
EEEE3089 2021-2022
Quantisation noise
The ADC quantises the input signal with a specific Δ (V) depending on the number of bits and the voltage range.
The output shows discrete jumps even though the input is smoothly changing. This corresponds to one LSB changing in the output of the digital form.
Δ = step size of ADC
EEEE3089 2021-2022
Quantisation noise
In digitising the data we have errors (e) for each point that is pulled down or rounded up to the next LSB.
The max error is +/- Δ/2 and this Quantisation error is uniformly distributed across that range and integrates to 1.
EEEE3089 2021-2022
Quantisation noise
The max error is +/- Δ/2 and this Quantisation error is uniformly distributed across that range and integrates to 1.
EEEE3089 2021-2022
Quantisation noise
Ideally the ADC will have an LSB which is smaller than the noise level so that the quantisation error is small compared to the random noise on the signal.
The number of levels limits the maximum SNR that can be achieved.
For a full range sinusoid we can work out what is compared to the quantisation error.
EEEE3089 2021-2022
Quantisation noise
Example: 16 Bit, 1MHz ADC, +/-1V input range.
Using the above check effective number of bits.
EEEE3089 2021-2022
Quantisation noise
Example: 16 Bit, 1MHz ADC, +/-1V input range.
Check effective number of bits Bits as expected
EEEE3089 2021-2022
/docProps/thumbnail.jpeg
程序代写 CS代考 加微信: powcoder QQ: 1823890830 Email: powcoder@163.com