UART
PLP/MIPS Datapath
Christopher Mar
Please watch the ”Instruction Breakdown/Datapath Tutorial” video before this lecture. This lecture covers, in more detail, how branch and jump addresses are handled.
Datapath Introduction
Control Signals
RegDst
Mux control
Selects if second or third register argument position is register that is written to
R-type instructions use the third register while other instructions (e.g. I-type and load word) use second register argument as destination
Control Signals
ALUSrc
Mux control
Selects if second ALU input comes from a register or the immediate field (I-Type instruction)
Load word and store word use immediate field going into ALU for address offset
Control Signals
MemtoReg
Mux control
Selects if value written back to register comes from memory (load word instruction) or the ALU result (R-type and I-type instructions)
Control Signals
RegWrite
Register file control
Enables writing to a register
If the result of an instruction writes to a register then this line is on
R-type, I-Type, load word
Control Signals
MemRead
Memory access control
Enables reading from a memory address
On only for load word instruction
Control Signals
MemWrite
Memory access control
Enables writing to a memory address
On only for store word instruction
Control Signals
Jump
Mux control
If enabled, program counter (PC) is updated with jump target address
Control Signals
Branch
AND’ed with ALU equality check (zero output)
If both this control signal and the ALU zero output are 1 then a multiplexer selects the branch target address rather than PC + 4 (the next instruction) as new PC
Control Signals
ALUOp
Selects which arithmetic function is performed by the ALU
Passed to ALU control for decoding and combining with shift amount (shamt) if used
ALUOp and ALU Control Signals
Instruction Opcode ALUOp Instruction Operation Funct field Desired ALU Action ALU control Output
LW 00 Load word XXXXXX Add 0010
SW 00 Store word XXXXXX Add 0010
Beq 01 Branch equal XXXXXX Subtract 0110
Add Immediate 00 Addiu XXXXXX Add 0010
R-type 10 Addu 100000 Add 0010
R-type 10 Subu 100010 Subtract 0110
R-type 10 AND 100100 AND 0000
R-type 10 OR 100101 OR 0001
R-type 10 Set on less than 101010 Set on less than 0111
Controller Outputs by Instruction
Instr RegDst ALUSrc MemtoReg RegWr MemRd MemWr Branch
R-type
000000 1 0 0 1 X 0 0
Controller Outputs by Instruction
Instr RegDst ALUSrc MemtoReg RegWr MemRd MemWr Branch
R-type
000000 1 0 0 1 X 0 0
lw
100011 0 1 1 1 1 0 0
Controller Outputs by Instruction
Instr RegDst ALUSrc MemtoReg RegWr MemRd MemWr Branch
R-type
000000 1 0 0 1 X 0 0
lw
100011 0 1 1 1 1 0 0
sw
101011 X 1 X 0 X 1 0
Controller Outputs by Instruction
Instr RegDst ALUSrc MemtoReg RegWr MemRd MemWr Branch
R-type
000000 1 0 0 1 X 0 0
lw
100011 0 1 1 1 1 0 0
sw
101011 X 1 X 0 X 1 0
beq
000100 X 0 X 0 X 0 1
Agenda for Next Class
Trace some instruction through the datapath on Canvas
This activity will be due at the end of class (2:45 pm)
I will go over the solutions in the following class