Microprocessors & Interfacing
COMP9032 Week1 1
Microprocessors & Interfacing
AVR ISA &
AVR Programming (I)
Lecturer : Annie Guo
COMP9032 Week1 2
Lecture Overview
• AVR ISA and Instructions
– A brief overview of our target machine
• AVR Programming (I)
– Implementation of basic programming structures
Atmel AVR (8-bit)
• RISC architecture
– Most instructions have 16-bit fixed length
– Most instructions take 1 clock cycle to execute
• Load-store memory access architecture
– All arithmetic and logic (AL) calculations are
performed on registers
• Internal program memory and data memory
• Wide variety of on-chip peripherals (digital
I/O, ADC, EEPROM, UART, pulse width
modulator (PWM) …).
COMP9032 Week1 3
•RISC: Reduced Instruction
Set Computer
•AL: Arithmetic and Logic
COMP9032 Week1 4
AVR Registers
• General purpose registers
– 32 8-bit registers, R0 ~ R31 or r0 ~ r31
– Can be further divided into two groups
• First half group (R0 ~ R15) and second half group
(R16 ~ R31)
• Some instructions work only on the second half group
R16~R31
– Due to the limitation of instruction encoding bits
» Will be covered later
– E.g. ldi rd, #number ;rd R16~R31
COMP9032 Week1 5
AVR Registers (cont.)
• General-purpose registers
– The following register pairs can work as
address registers (or address pointers)
• X, R27:R26
• Y, R29:R28
• Z, R31:R30
– The following registers can be used for
specific purposes
• R1:R0 stores the result of a multiplication
instruction
• R0 stores the data loaded from the program
memory
COMP9032 Week1 6
AVR Registers (cont.)
• I/O registers
– 64+ 8-bit registers
• Their names are defined in the m2560def.inc file
– Used in input/output operations
• Mainly for storing data/addresses and control signal bits
– Will be covered in detail later
• Status register (SREG)
– A special I/O register
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SREG
• The Status REGister (SREG) contains information
about the result of the most recently executed AL
instruction. This information can be used for altering
program execution flow in order to perform
conditional operations.
• SREG is updated by hardware after an AL operation.
– Some instructions such as load do not affect SREG.
• SREG is not automatically saved when entering an
interrupt routine and restored when returning from an
interrupt. This must be handled by software.
– Using in/out instruction to store/restore SREG
– To be covered later
COMP9032 Week1 8
SREG (cont.)
• Bit 0 – C: Carry Flag
– Its meaning depends on the operation.
• For addition x+y, it is the carry from the most significant bit.
• For subtraction x-y, where x and y are unsigned integers, it
indicates whether x
• For example
std Y+10, r14
— (Y+10) r14
COMP9032 Week1 34
Indirect Addressing with Pre-
decrement
• The address of memory data is from an address
pointer (X, Y, Z) and the value of the pointer is auto-
decreased before each memory access.
• For example
std -Y, r14
— YY-1, (Y) r14
COMP9032 Week1 35
Indirect Addressing with Post-
increment
• The address of memory data is from an address
pointer (X, Y, Z) and the value of the pointer is auto-
increased after each memory access.
• For example
std Y+, r14
— (Y) r14, Y Y+1
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Direct Program Addressing
• The instruction address is from instruction
• For example
jmp k
— PC k
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Relative Program Addressing
• The instruction address is PC+k+1
• For example
rjmp k
— PC PC+k+1
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Indirect Memory Addressing
• The instruction address is stored in Z register
icall
— PC(15:0) (Z), PC(21:16) 0
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Program Memory Constant
Addressing
• The address of the constant data is stored in
Z register
– The address is a byte address.
• For example:
lpm
— r0 (Z)
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Program Memory Constant
Addressing with Post-increment
• For example
lpm r16, Z+
— r16 (Z), ZZ+1
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AVR Programming
• Refer to the AVR Instruction Set document for
the complete list of instructions
– http://www.cse.unsw.edu.au/~cs9032, follow the
link: References → Documents →AVR-Instruction-
Set.pdf
– We will learn individual instructions through
• Lectures, homework, and lab exercises
• The rest of the lecture demonstrates AVR
assembly programming
– By implementing some basic structures with
examples
• Sequence
• Selection
• Iteration
COMP9032 Week1 42
Sequence (1/5)
– example
• Find the value of expression
– where all values including the results from
multiplications are 8-bit unsigned numbers; and
x, y, z are stored in registers r2, r3, and r4,
respectively.
2
2 xxyxz −−=
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What instructions do we need?
• sub
• mul
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Subtract without Carry
• Syntax: sub Rd, Rr
• Operands: Rd, Rr {r0, r1, …, r31}
• Operation: Rd Rd – Rr
• Flags affected: H, S, V, N, Z, C
• Words: 1
• Cycles: 1
COMP9032 Week1 45
Multiply Unsigned
• Syntax: mul Rd, Rr
• Operands: Rd, Rr {r0, r1, …, r31}
• Operation: r1:r0 Rr*Rd
– (unsigned unsigned * unsigned )
• Flags affected: Z, C
– C is set if bit 15 of the result is set; cleared
otherwise.
• Words: 1
• Cycles: 2
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What instructions do we need?
• sub
• mul
• ldi
• mov
COMP9032 Week1 47
Load Immediate
• Syntax: ldi Rd, k
• Operands: Rd{r16, …, r31}, 0 ≤ k 255
• Operation: Rd k
• Flag affected: None
• Words: 1
• Cycles: 1
• Encoding: 1110 kkkk dddd kkkk
• Example:
ldi r16, $42 ; Load $42 to r16
8-bit binary
COMP9032 Week1 48
Copy Register
• Syntax: mov Rd, Rr
• Operands: Rd, Rr {r0,r1,…,r31}
• Operation: Rd Rr
• Flag affected: None
• Words: 1
• Cycles: 1
COMP9032 Week1 49
Sequence (2/5)
– example
• AVR code for
– where all values including results from multiplications are 8-
bit unsigned numbers; and x, y, z are stored in registers r2,
r3, and r4, respectively.
– 8 instructions and 11 cycles
2
2 xxyxz −−=
ldi r16, 2 ; r16 2
mul r16, r2 ; r1:r0 2x
mov r5, r0 ; r5 2x
mul r2, r3 ; r1:r0 xy
sub r5, r0 ; r5 2x-xy
mul r2, r2 ; r1:r0 x2
sub r5, r0 ; r5 2x-xy- x2
mov r4, r5 ; r4 z
COMP9032 Week1 50
Sequence (3/5)
• AVR code for
– where all data including products from multiplication are 8-bit
unsigned numbers; and x, y, z are stored in registers r2, r3,
and r4, respectively.
– 7 instructions and 10 cycles
2
2 xxyxz −−=
ldi r16, 2 ; r16 2
mul r16, r2 ; r1:r0 2x
mov r4, r0 ; r4 2x
mul r2, r3 ; r1:r0 xy
sub r4, r0 ; r4 2x-xy
mul r2, r2 ; r1:r0 x2
sub r4, r0 ; r4 2x-xy- x2
COMP9032 Week1 51
Sequence (4/5)
• Find the value of the expression
– where all data including products from
multiplications are 8-bit unsigned numbers; and x,
y, z are stored in registers r2, r3, and r4,
respectively.
2
2 xxyxz −−=
))(2( yxx +−=
COMP9032 Week1 52
What instructions do you need?
• sub
• mul
• ldi
• mov
• add
COMP9032 Week1 53
Add without Carry
• Syntax: add Rd, Rr
• Operands: Rd, Rr {r0, r1, …, r31}
• Operation: RdRd + Rr
• Flags affected: H, S, V, N, Z, C
• Words: 1
• Cycles: 1
COMP9032 Week1 54
Sequence (5/5)
• AVR code for
– where all data including products from multiplications are 8-
bit unsigned numbers; and x, y, z are stored in registers r2,
r3, and r4, respectively.
– 6 instructions and 7 cycles
2
2 xxyxz −−=
))(2( yxx +−=
mov r4, r2 ; r4 x
add r4, r3 ; r4 x+y
ldi r16, 2 ; r16 2
sub r16, r4 ; r16 2-(x+y)
mul r2, r16 ; r1:r0 x(2-(x+y))
mov r4, r0 ; r4 z
COMP9032 Week1 55
Selection (1/2)
– example
• IF-THEN-ELSE control structure
– Assume numbers a, b are 8-bit signed integers and stored
in registers. You need to decide which registers to use.
• Instructions involved:
– Compare
– Conditional branch
– Unconditional jump
if(a<0) b=1; else b=-1; COMP9032 Week1 56 Compare • Syntax: cp Rd, Rr • Operands: Rd {r0, r1, …, r31} • Operation: Rd - Rr (Rd is not changed) • Flags affected: H, S, V, N, Z, C • Words: 1 • Cycles: 1 • Example: cp r4, r5 ; Compare r4 with r5 brne noteq ; Branch if r4 r5 ... noteq: nop ; Branch destination (do nothing) COMP9032 Week1 57 Compare with Immediate • Syntax: cpi Rd, k • Operands: Rd {r16, r17, …, r31} and 0 k 255 • Operation: Rd – k (Rd is not changed) • Flags affected: H, S, V, N, Z, C • Words: 1 • Cycles: 1 COMP9032 Week1 58 Conditional Branch • Syntax: brge k • Operands: -64 ≤ k < 64 • Operation: If RdRr (NV=0) then PCPC+k+1, else PC PC+1 if condition is false • Flag affected: None • Words: 1 • Cycles: 1 if condition is false; 2 if condition is true S bit in SREG: S=0 COMP9032 Week1 59 Relative Jump • Syntax: rjmp k • Operands: -2K ≤ k < 2K • Operation: PCPC+k+1 • Flag affected: None • Words: 1 • Cycles: 2 COMP9032 Week1 60 Selection (2/2) • IF-THEN-ELSE control structure – Numbers a, b are 8-bit signed integers and stored in registers. You need to decide which registers to use. .def a=r16 .def b=r17 cpi a, 0 ;a-0 ldi b, 1 ;b=1 ELSE: ldi b, -1 ;b=-1 END: … if(a<0) b=1; else b=-1; brge ELSE ;if a0, go to ELSE rjmp END ;end of IF statement COMP9032 Week1 61 Iteration (1/2) • WHILE loop – Numbers i, sum are 8-bit unsigned integers and stored in registers. You need to decide which registers to use. sum =0; i=1; while (i<=n){ sum += i*i; i++; } 𝑖=1 𝑛 𝑖2 Iteration (2/2) • WHILE loop COMP9032 Week1 62 .def i = r16 .def n = r17 .def sum = r18 ldi i, 1 ;initialization clr sum loop: cp n, i brlo end mul i, i add sum, r0 inc i rjmp loop end: rjmp end COMP9032 Week1 63 Reading Material • AVR Instruction Set online document about: – Instruction set nomenclature – I/O Registers (can skip for now) – The program and data memory Addressing – Arithmetic instructions, program execution flow control instructions COMP9032 Week1 64 Homework 1. Refer to the AVR Instruction Set document (available at http://www.cse.unsw.edu.au/~cs9032, under the link References → Documents → AVR- Instruction-Set.pdf). Study the following instructions: – Arithmetic and logic instructions • add, adc, adiw, sub, subi, sbc, sbci, sbiw, mul, muls, mulsu • and, andi, or, ori, eor • com, neg COMP9032 Week1 65 Homework 1. Study the following instructions (cont.) – Branch instructions • cp, cpc, cpi • rjmp • breq, brne • brge, brlt • brsh, brlo – Data transfer instructions • mov • ldi, ld, st COMP9032 Week1 66 Homework 2. Write assembly code for the following functions 1) 2-byte addition (i.e, addition on 16-bit numbers) 2) 2-byte signed subtraction 3) Sign-extension of one byte value to two bytes