1BA3 Introduction To Computing
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 1
Digital System Design
Physical Design
Circuit Design
Logic Design
Register Transfer Level Design
Functional Design
Top-down
Digital
System
Design
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 2
Functional Design
Functional design is based on:
Requirement specification
Target implementation influences the design flow
CPU
ASIC (Application Specific Integrated Circuits)
FPGA (Field Programmable Gate Arrays)
Requirements:
Operation, Performance, Interface, Cost, Size, Power
dissipation…
Functional design may be verified through simulation
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 3
Register Transfer Level
Design (RTL)
This step in the design flow transforms the high-level
functional design into a description at the register
level.
The Register Transfer Level Design describes the
design at the following level of abstraction:
Registers
Memory
Arithmetic Units
State Machines
RTL designs are validated through simulation
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 4
Logic Design
At this stage in the design flow the register level
transfer design is compiled into logic design.
Again the design may be verified through simulation.
Please note:
Simulation may be used to guaranty that the design meets the
specification.
The simulation in every step in the design flow allows for the
interception of errors early in the design.
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 5
Circuit Design
At this stage in the design flow the logic
design is compiled into circuit design.
The step is strongly influenced by the target
implementation.
Again the design may be verified through
simulation specifically through:
Timing simulation
Circuit analysis.
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 6
Physical Design
In the final step in the design flow the
circuit design determines the physical chip
layout.
Physical properties may be verified:
Chip area
Power dissipation
Clock frequency
CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 7
Digital System
Design Hierarchy
Physical Design
Circuit Design
Logic Design
RTL Design
Functional Design
Level of
abstraction
High
Low
Description
Large number of
simple components
Small number of
complex components
R1 <- R1 +R2 Gates Circuit Transistor CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 8 Hardware Description Languages Hardware Description Languages are used to: Describe digital systems Model digital systems Design digital systems Hardware Description Languages: VHDL, Verilog and more VHDL VHSIC Hardware Description Language VHSIC Very High Speed Integrated Circuit Language CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 9 Target Implementation ASIC FPGA CPU Design flow depends on target hardware Application Specific Integrated Circuits Algorithms HDL Machine Code RTL Logic Design Circuit Design Physical Design RTL Logic Design Circuit Design Assembly Code Physical Design CSU22022, 1st HDL Lecture, Dr. M. Manzke, Page: 10 Design Views Behavioural Structural Physical Processor Algorithms Boards Register Register Transfers Chips Gates Modules Boolean Expressions Transistors Cells Transfer Functions Digital System Design Functional Design Register Transfer Level Design (RTL) Logic Design Circuit Design Physical Design Digital System Design Hierarchy Hardware Description Languages Target Implementation Design �Views