Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Memory Access
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,
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How data is organized in memory? Big Endian vs Little Endian
How data is addressed?
Register offset
LDR r1, [r0, r3] ; offset = r3
LDR r1, [r0, r3, LSL #2] ; offset = r3 * 4
Immediate offset
Pre-index: LDR r1, [r0, #4]
Post-index: LDR r1, [r0], #4
Pre-index with update: LDR r1, [r0, #4]!
2 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5 ECE 3375b (A.Reyhani)
Logic View of Memory
By grouping bits we can store more values 8bits=1byte
16 bits = 2 bytes = 1 halfword 32bits=4bytes=1word
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
3 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Logic View of Memory
By grouping bits we can store more values 8bits=1byte
16 bits = 2 bytes = 1 halfword 32bits=4bytes=1word
From software perspective, memory is an
addressable array of bytes.
The byte stored at the memory address 0x20000004 is 0b10000100
0b10000100 0x84 132 Binary Hexadecimal Decimal
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Computer memory is byte-addressable!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
Low Address
ECE 3375b (A.Reyhani)
Logic View of Memory
When we refer to memory locations by address, we can only do so in units of bytes, halfwords or words
32bits =4bytes =1word =2halfwords
Memory address of a word is the lowest address of all four bytes in that word.
Two words at addresses: 0x20000000
0x20000004
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Logic View of Memory
Can you store a word anywhere?
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
6 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Logic View of Memory
Can we store a word anywhere in memory? NO on most computers!
A word can only be stored at an address that’s divisible by 4.
Word-address mod 4 = 0
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
We cannot store a word at address 0x20000002.
Logic View of Memory
Halfwords
16 bits = 2 bytes = 1 halfword
The right diagram has four halfwords at addresses of: 0x20000000
0x20000002
0x20000004
0x20000006
High Address
0x20000007
0x20000006
0x20000005
0x20000004
0x20000003
0x20000002
0x20000001
0x20000000
Low Address
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Logic View of Memory
Can you store a halfword anywhere? NO.
A halfword can only be stored at an address that’s divisible
Memory address of a halfword is the lowest address of its two bytes.
Halfword-address mod 2 = 0
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
We cannot store a
halfword at address
0x20000001.
High Address
uint32_t x[4];
What are their memory address offsets?
Low Address
High Address
uint32_t X[4];
What are their memory address offsets?
Offset = ???
Offset = ???
Offset = ???
Offset = ???
Low Address
Offset of bytes
uint32_t X[4];
What are their memory address offsets?
Offset = ???
Offset = ???
Offset = ???
Offset = ???
Offset of bytes
uint32_t X[4];
What are their memory address offsets?
If the array starts at address pAddr,
• Memory address of X[0] is pAddr
• Memory address of X[1] is pAddr + 4
• Memory address of X[2] is pAddr + 8
• Memory address of X[3] is pAddr + 12
Sequential words are at addresses incremented by 4, not by 1!
Offset = 12
Offset = 8
Offset = 4
Offset = 0
Which end do you break to eat a boiled egg?
Little Endian
Big Endian
High address
least address
Big Endian
least address
Low address
Gulliver’s Travels (by , published in 1726):
• Two religious sects of Lilliputians
• The Little-Endians crack open their eggs from the little end
• The Big-Endians break their on the big end
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
High address
Endian: byte order, not bit order!
Low address
Little-Endian
High address
least address
uint32_t a = 0x87654321
Reading from the top
Big Endian
least address
Big-Endian
High address
byte 3 byte 2 byte 1 byte 0
byte 0 byte 1 byte 2 byte 3
Reading from the bottom
Low address
Low address
ECE 3375b (A.Reyhani)
Little Endian vs Big Endian
High address
Low address
Little Endian
LSB is at least address!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Little Endian vs Big Endian
High address
High address
Low address
Low address
Little Endian
LSB is at least address!
Big Endian
MSB is at least address!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Little Endian vs Big Endian
High address
High address
Low address
Little Endian
LSB is at least address!
Low address
Big Endian
MSB is at least address!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Word stored at 0x20000000? Address Contents
0x20000003 0x20000002 0x20000001 0x20000000
If Little Endian
value = 0x04030201
If Big Endian
value = 0x01020304
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
If big endianess is used
The word stored at address 0x20008000 is
Memory Address
Memory Data
0x20008003
0x20008002
0x20008001
0x20008000
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
0xEE8C90A7
Memory Address
Memory Data
0x20008003
0x20008002
0x20008001
0x20008000
If little endianess is used
The word stored at address 0x20008000 is
Endian only specifies byte order, not bit order in a byte!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
0xA7908CEE
Endian on Modern Architecture
Intel x86 and AMD64/x86-64 use little endian.
Atmel AVR32 and OpenRISC use big endian.
Arm Cortex-M supports both Little Endian
and Big Endian. However, endian maybe fixed
for specific chips.
ST’s L4 Series, TI’s Tiva C, and NXP’s K64 only supports only Little Endian.
Little Endian
LSB is at least address
Big Endian
least address
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Loading Data from Memory
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Storing Data to Memory
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Load-Modify-Store
C statement
x = x + 1;
26 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Assume variable X resides in
memory and is a 32-bit integer
; Assume the memory address of x is stored in r1
LDR r0, [r1] ADD r0, r0, #1 STR r0, [r1]
; load value of x from memory ; x = x + 1
; store x into memory
3 Steps: Load, Modify, Store
1 Load 3 Store
x = x + 1;
ALU cannot directly
operate memory data!
Variable x resides in memory!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Load Instructions
LDR rt, [rs]
Read from memory
Mnemonic: LoaD to Register (LDR)
rs specifies the memory address
rt holds the 32-bit value fetched from memory
For Example:
; Assume r0 = 0x08200004
; Load a word:
LDR r1, [r0] ; r1 = Memory.word[0x08200004]
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Store Instructions
STR rt, [rs]
Write into memory
Mnemonic: STore from Register (STR)
rs specifies memory address
Save the content of rt into memory
For Example:
; Assume r0 = 0x08200004
; Store a word
STR r1, [r0] ; Memory.word[0x08200004] = r1
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Loading Word from MemoryLDR r1, [r0] ; r1 = memory.word[r0] ; LDR stands for Load to Register
0x20000000
0xDEADBEEF
Contents Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Processor Core Memory
Embedded Systems with ARM Cortex-M ECE 3375b (A.Reyhani) Microcontrollers (Dr. Y. Zhu): Chapter 5
Storing Word to Memory
STR r1, [r0] ; memory.word[r0] = r1 ; STR stands for Store Register
0x20000000
0xBADDCAFE
Contents Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Processor Core
Embedded Systems with ARM Cortex-M ECE 3375b (A.Reyhani) Microcontrollers (Dr. Y. Zhu): Chapter 5
Storing Word to Memory
STR r1, [r0] ; memory.word[r0] = r1 ; STR stands for Store Register
0x20000000
0xBADDCAFE
Contents Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Processor Core
Embedded Systems with ARM Cortex-M ECE 3375b (A.Reyhani) Microcontrollers (Dr. Y. Zhu): Chapter 5
Load/Store a Byte, Halfword, Word
LDRxxx R0, [R1]
; Load data from memory into a 32-bit register
uint32_t/int32_t
unsigned or signed int
unsigned char
Load Halfword
unsigned short int
Load Signed Byte
signed char
Load Signed Halfword
signed short int
STRxxx R0, [R1]
; Store data extracted from a 32-bit register into memory
Store Word
uint32_t/int32_t
unsigned or signed int
Store Lower Byte
uint8_t/int8_t
unsigned or signed char
Store Lower Halfword
uint16_t/int16_t
unsigned or signed short
33 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Load a Byte, Half-word, Word
Load a Byte
LDRB r1, [r0]
Load a Halfword
LDRH r1, [r0]
0x02000003 0x02000002 0x02000001 0x02000000
Little Endian
Assume r0 = 0x20000000
Load a Word
LDR r1, [r0]
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Sign Extension
Load a Signed Byte
LDRSB r1, [r0]
Load a Signed Halfword
LDRSH r1, [r0]
0x20000003 0x20000002 0x20000001 0x20000000
Little Endian
Assume r0 = 0x20000000
Facilitate subsequent 32-bit signed arithmetic!
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Address Modes: Offset in Register
Address accessed by LDR/STR is specified by a base register plus an offset Offset can be hold in a register
LDR r0,[r1,r2]
Base memory address hold in register r1 Offset hold r2
Target address = r1 + r2
LDR r0,[r1,r2,LSL #2]
Base memory address hold in register r1 Offset = r2, LSL #2
Target address = r1 + r2 * 4
36 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Address Modes: Immediate Offset
Address accessed by LDR/STR is specified by a base register plus an offset Offset can be an immediate value
LDR r0,[r1,#8]
Base memory address hold in register r1 Offset is an immediate value
Target address = r1 + 8
Three modes for immediate offset: • Pre-index,
• Post-index,
• Pre-index with Update
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Addressing Mode: Pre-index vs Post-index
Pre-index
LDR r1, [r0, #4]
Post-index
LDR r1, [r0], #4
Pre-index with Update
LDR r1, [r0, #4]!
38 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5 ECE 3375b (A.Reyhani)
Pre-Index: LDR r1, [r0, #4] Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
39 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5 ECE 3375b (A.Reyhani)
Pre-Index: LDR r1, [r0, #4] Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
0x20008000
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Pre-Index: LDR r1, [r0, #4] Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
r0 + offset offset=4
0x20008000
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Pre-Index: LDR r1, [r0, #4] Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Assume Little Endian
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
r0 + offset offset=4
0x88796A5B
0x20008000
Accessing an Array
Pre-index
Assume r0 = 0x20008000.
uint32_t array[10]; array[0] += 5; array[1] += 5;
Assume the memory address of the array starts at 0x20008000.
LDR r1, [r0] ; Read array[0] ADD r1, r1, #5
STR r1, [r0] ; Write to array[0]
LDR r1, [r0, #4] ; Read array[1] ADD r1, r1, #5
STR r1, [r0, #4] ; Write to array[1]
43 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Post-index
Post-Index: LDR r1, [r0], #4 Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
44 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5 ECE 3375b (A.Reyhani)
Post-index
Post-Index: LDR r1, [r0], #4 Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
0x20008000
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Post-index
Post-Index: LDR r1, [r0], #4 Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Assume Little Endian
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
0x4C3D2E1F
0x20008000
ECE 3375b (A.Reyhani)
Post-index
Post-Index: LDR r1, [r0], #4 Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Update r0 after reading memory
r0 = r0 + offset
ECE 3375b (A.Reyhani)
Assume Little Endian
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
0x4C3D2E1F
0x20008004
Pre-index with Update
Pre-Index with Update: LDR r1, [r0, #4]! Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
Pre-index with Update
Pre-Index with Update: LDR r1, [r0, #4]! Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Assume Little Endian
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
r0 + offset
0x88796A5B
0x20008000
Pre-index with Update
Pre-Index with Update: LDR r1, [r0, #4]! Assume: r0 = 0x20008000
Offset: range is -255 to +255
Memory Address
Memory Data
0x20008007
0x20008006
0x20008005
0x20008004
0x20008003
0x20008002
0x20008001
0x20008000
Assume Little Endian
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 5
ECE 3375b (A.Reyhani)
r0 + offset
Update r0 after reading memory
0x88796A5B
0x20008004
Summary of Pre-index and Post-index
Index Format
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