CS代考 ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engine

ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

1. Introduction to Computer and Assembly
2. ARM Processor and Peripheral Registers
3. Simple Computation on Memory
4. ARM Cortex-M3/M4 and Cortex A9 systems
5. Introduction to ARM Assembly
6. Assembler Directives
7. Introduction to the Simulator
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)

Why should we learn Assembly?
 Assembly isn’t “just another language”.
 Help you understand how the processor works
 Assembly program runs faster than high-level language.
 Performance critical codes may need to be written in assembly.
 Use the profiling tools to find the performance bottleneck and rewrite that code section in assembly
 Latency-sensitive applications, such as aircraft controller and anti-lock brake system ( ABS)
 Standard C compilers do not use some operations available on ARM processors, such ROR (Rotate Right) and RRX (Rotate Right Extended).
 Hardware/processor specific code,  Processor booting code
 Device drivers
 Compiler, assembler, linker
 Cost-sensitive applications
 Embedded devices, where the size of code is limited, such as IoT devices, washing machine controller,
automobile controllers
 Better understand high-level programming languages
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 1

Why ARM processor?
 My name is -Masoleh (ARM)
 ARM: Acron RISC Machine
 RISC (Reduced Instruction Set Computer)
 Small number of fixed-length instructions.
 Simple, uniform, and standardized instruction formats
 Each instruction is executed in a single cycle which is good for pipelining
 Limited addressing modes
 requires more memory for the code
 Register to register instructions; Load (data transfer memory to register) and Store (data transfer from register to memory) operations are independent instructions
 CISC (Complex Instruction Set Computer)
 Large number of variable-length instructions
 Complex and variable-length instruction formats
 The number of execution cycles for each instruction varies depending on the instruction  More addressing modes
 Emphasis on hardware and smaller code size
 Memory to Memory instructions; Load and Store operations are incorporated in instructions

Why ARM processor? (cont.)
 In 2010 alone, 6.1 billion ARM-based processor, representing 95% of smartphones, 35% of digital televisions and set-top boxes and 10% of mobile computers
 As of 2019, 150 billion ARM processors have been produced
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 1

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
ARM Instruction Set Architecture
Lesson I: Introduction to Computer and Assembly Language
Part b: History on ARM Processors and their Instruction Sets
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

STM32L4 (textbook)
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

In our lab, we use Intel® DE10-Standard development and education board which contains ARM Cortex A9
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

ARM Processors
 ARM Cortex-A family:  Applications processors
 Support OS and high-performance applications  Such as Smartphones, Smart TV
 ARM Cortex-R family:
 Real-time processors with high performance and
high reliability
 Support real-time processing and mission-critical control
 ARM Cortex-M family:
 Microcontroller
 Cost-sensitive, support SoC
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Instruction Sets
 Instructions:
 Encoded to binary machine code by
 Executed at runtime by hardware
 Early 32-bit ARM vs Thumb/Thumb-2
 Early ARM has larger power consumption and
larger program size
 16-bit Thumb, first used in ARM7TDMI processors in 1995
 Thumb-2: a mix of 16-bit (high code density) and 32-bit (high performance) instructions
 ARM Cortex-M:
 Subset of Thumb-2
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Instruction Sets of ARM Cortex-A9
ARM Cortex-A9 processor in the Intel® DE10-Standard development and education board available in our lab
• can execute instructions in three different instruction sets, ARM, Thumb and Thumb-2.
• Therefore, its instruction set should cover ARM Cortex-M
• The ARM set is the most powerful and all ARM set instructions are 32 bits long.
• For on-line learning, we use a simulator known as CPUlator (https://cpulator.01xz.net/) to
model the lab board (ARMv7 DE1-SOC). It is noted that this simulator does not model
Thumb and Thumb 2 instructions and only models ARM 32 instructions.

Instruction Sets
from arm.com

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 2: Processor and Peripheral Registers Part a
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Processor Registers
 Fastest way to read and write
 Registers are within the processor chip
Low Registers
General Purpose Register
High Registers
Register Bank
Special Registers
Special Purpose Register
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Processor Registers
Low Registers
 Fastest way to read and write
 Registers are within the processor chip
 Each register has 32 bits
 ARM Cortex-M4 has
 Register Bank: R0 – R15
 R0-R12: 13 general-purpose registers  R13: Stack pointer (Shadow of MSP or
 R14: Link register (LR)
 R15: Program counter (PC)
General Purpose Register
High Registers
Register Bank
Special Registers
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3
Special Purpose Register

Processor Registers
Low Registers
 Fastest way to read and write
 Registers are within the processor chip
 Each register has 32 bits
 ARM Cortex-M4 has
 Register Bank: R0 – R15
 R0-R12: 13 general-purpose registers
 R13: Stack pointer (Shadow of MSP or
 R14: Link register (LR)
 R15: Program counter (PC)
 Special registers
 xPSR, BASEPRI, PRIMASK, etc
General Purpose Register
High Registers
Register Bank
Special Registers
Special Purpose Register
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Processor Registers
Low Registers
 Low Registers (R0 – R7)
 Can be accessed by any instruction
 High Register (R8 – R12)
 Can only be accessed by some instructions
 Stack Pointer (R13)
 Cortex-M4 supports two stacks
 Main SP (MSP) for privileged access (e.g. exception handler)
 Process SP (PSP) for application access
General Purpose Register
3. Execute
1. Fetch instruction at PC address
High Registers
Register Bank
the instruction
the instruction
R13 (MSP) R13 (PSP)
Purpose  Register
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3
Program Counter (R15)
 Memory address of the current instruction

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 2: Processor and Peripheral Registers Part b
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

ARM Cortex-A9 Register Structure
Current Program Status Register (CPSR):
Condition Code flags:
o Negative (N) – set to 1 if the result is negative; otherwise, cleared
o Zero (Z) – set to 1 if the result is 0; otherwise, cleared to 0. o Carry (C) – set to 1 if a carry-out results from the operation;
otherwise, cleared to 0.
o Overflow (V) – set to 1 if arithmetic overflow occurs; otherwise
cleared to 0. Interrupt-disable bits, I and F
o I = 1 disables the IRQ interrupts
o F = 1 disables FIQ interrupts Thumb bit
o T = 0 indicates ARM execution
o T = 1 indicates Thumb execution
Processor mode bits identify the mode in which the processor is operating
INTRODUCTION TO THE ARM PROCESSOR USING INTEL® FPGA TOOL CHAIN

Processor Registers vs Peripheral Registers
ARM Cortex-M Core
Control Unit
UART1 Registers
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Processor Registers vs Peripheral Registers
 Processor can directly access processor registers  ADD r3,r1,r0 ; r3 = r1 + r0
 Processor access peripheral registers via memory mapped I/O
 Each peripheral register is assigned a fixed memory address at the chip design stage
 Processor treats peripherals registers the same as data memory
 Processor uses load/store instructions to read from/write to memory (to be covered in future lectures)
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 3: Simple Computation on Memory Part a: C vs Assembly
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

C vs Assembly
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 3: Simple Computation on Memory Part b: Load-Modify-Store
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Load-Modify-Store
Translating C to assembly
• Load values from memory into registers
• Modify value by applying arithmetic operations
• Store result from register to memory
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Load-Modify-Store
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 4: ARM Cortex-M3/M4 and Cortex A9 systems
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

ARM Cortex-M3 Organization (STM32L1)
Instruction Bus
Data Bus System Bus
Instructions
LCD SPI2 TIM2 I2C1 TIM4 I2C2
TIM6 USB 2.0 FS
USART2 DAC2
USART3 USB RAM
Cortex-M3 Processor Core
Interrupts
Advanced High- performance Bus (AHB)
Advanced Peripheral Bus (APB)
AHB to APB Bridge 1
AHB to APB Bridge 2
System-on-a-chip
GPIO Port A GPIO Port B GPIO Port C GPIO Port D GPIO Port E GPIO Port H
Flash Memory
Memory Protection Unit (MPU)
EXT ADC WKUP TIM9 SPI1 TIM10 USART1 TIM11
Direction Memory Access (DMA) Controller
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3
Interrupt Controller (NVIC)
Trace & Debug Interface
Processor Control Unit
ALU Instruction Decoder Instruction
AHB Bus Matrix
Memory Interface

ARM Cortex-M4 Organization (STM32L4)
TIM3 I2C1/SMBUS
TIM4 I2C2/SMBUS
TIM6 I2C3/SMBUS
TIM7 USB 2.0 FS
USART2 bxCAN
USART3 SWPMI1
USART4 LPTIM1
USART5 LPTIM2
LPUART1 OpAmp
Instruction Bus
Data Bus System Bus
Instructions
Cortex-M4 Processor Core
Memory Protection Unit (MPU)
` Interrupts
Advanced High- performance Bus (AHB)
Advanced Peripheral Bus (APB)
AHB to APB Bridge 1
AHB to APB Bridge 2
System-on-a-chip
GPIO Port A GPIO Port B GPIO Port C GPIO Port D GPIO Port E GPIO Port F GPIO Port G GPIO Port H
TIM1/PWM SAI2 TIM8/PWM DFSDM TIM15
Direction Memory Access (DMA) Controllers
COMP1 COMP2 Firewall
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3
Flash Memory
Interrupt Controller (NVIC)
Trace & Debug Interface
Processor Control Unit
Single Instruction Multiple Data (DSP)
FPU (optional)
ALU Instruction Decoder Instruction
AHB Bus Matrix
Memory Interface

DE10-STANDARD COMPUTER SYSTEM WITH ARM* CORTEX* A9
DE10-STANDARD COMPUTER SYSTEM WITH ARM* CORTEX* A9

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 5: Introduction to ARM Assembly Part a: Instruction Format
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Assembly Instructions
 Arithmetic and logic
 Add, Subtract, Multiply, Divide, Shift, Rotate
 Data movement
 Load, Store, Move
 Compare and branch
 Compare, Test, If-then, Branch, compare and branch on zero
 Miscellaneous
 Breakpoints, wait for events, interrupt enable/disable, data memory barrier, data
synchronization barrier
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Instruction Format:
label mnemonic operand1, operand2, operand3 ; comments
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Instruction Format: Labels
label mnemonic operand1, operand2, operand3 ; comments
 Place marker, marking the memory address of the current instruction  Used by branch instructions to implement if-then or goto
 Must be unique
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Instruction Format: Mnemonic
label mnemonic operand1, operand2, operand3 ; comments  The name of the instruction
 Operation to be performed by processor core
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Instruction Format: Operands
label mnemonic operand1, operand2, operand3 ; comments
 Operands  Registers
 Constants (called immediate values)  Number of operands varies
 No operands:
 One operand:
 Two operands:
 Three operands: ADD R1, R2, R3
 Four operands: MLA R1, R2, R3, R4
 Normally
; Data synchronization barrier, No operation ; PCLR
; compare, update N, Z, C, V flags on R1-R2 ; R1  R2+R3
; Multiply with accumulate, R1((R2*R3)+R4) [31:0]
CMP R1, R2
 operand1 is the destination register, and operand2 and operand3 are source operands.
 operand2 is usually a register, and the first source operand
 operand3 may be a register, an immediate number, a register shifted to a constant number of bits, or a register plus an offset (used for memory access).
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 5: Introduction to ARM Assembly Part b: Instruction Format (cont.)
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Instruction Format: Comments
label mnemonic operand1, operand2, operand3 ; comments  Everything after the semicolon (;) is a comment
 Explain programmers’ intentions or assumptions
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

ARM Instruction Format
mnemonic operand1, operand2, operand3
target ADD r0, r2, r3
label mnemonic destination 1st source operand operand
; comments
; r0 = r2 + r3
2nd source operand
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

ARM Instruction Format
label mnemonic operand1, operand2, operand3 ; comments
target ADD r0, r2, r3 ; r0 = r2 + r3
Bad comment!
A better example:
; Increment angle r2 by step size r3
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

ARM Instruction Format
label mnemonic operand1, operand2, operand3 ; comments
Examples: Variants of the ADD instruction
ADD r1, r2, r3 ADD r1, r3 ADD r1, r2, #4 ADD r1, #15
; r1 = r2 + r3 ; r1 = r1 + r3 ; r1 = r2 + 4 ; r1 = r1 + 15
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3

Instruction Format: Labels and comments (simulator that we use in the lab)
label: mnemonic operand1, operand2, operand3 /* comment */
 The label must have colon :
 The comment should be between /* and */

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 5: Introduction to ARM Assembly Part c: Example 1
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Example 1 Assembly Program: Copying a String
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 3 ECE 3375b

Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 3 ARM Instruction Set Architecture Lesson 5: Introduction to ARM Assembly Part d: Example 2
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,

Example 2 Assembly Program: DOT Product of two Vectors (simulator that we use in the lab)

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