PIC18 Assembly Language Programming
4.1 General Assembly Language Programming
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• Machine vs. assembly language
• Structure of assembly language
• The program counter and program memory in PIC
• Fetching and execution in PIC
• Some example directives: ORG, END, EQU and SET
Machine and Assembly Language
• Machine Language (opcode)
– A sequence of 0s and 1s that can be executed
by the processor
– Hard to understand, program, and debug for human being
• Assembly Language (Source Code)
– Defined by assembly instructions
– Assembly programs must be translated by an assembler before it can be executed
– referred to as low-level language because the program needs to know the detailed interaction with the CPU
Machine and Assembly Language
• e.g., in PIC
Machine Code
Assembly Code
0E32 movlw 0x32
6E05 movwf 0x05, A 0EDF movlw 0xDF
2605 addwf 0x05, F, A 0E34 movlw 0x34 6E06 movwf 0x06, A 0E57 movlw 0x57
2206 addwfc 0x06, F, A
Two Types of Assembly Statements
• Directives (pseudo- instruction)
– Used to control the assembler – Do not generate machine code – e.g., ORG 0x0000 and END
• Assembly language instructions
– Do generate machine code to perform various operations
– e.g., all lines except the comments and directives
4 Elements of an Assembly Language Statement
1. Label (Optional)
• Must start in column 1
• e.g., loop: addwf 0x20, W, A; 2. Mnemonics
– Could either be an assembly instruction mnemonic or an assembler directive
– Examples of Mnemonics:
• org 0x0000
• loop: addwf 0x20, W, A
4 Elements of an Assembly Language Statement
3. Operands (Optional) • org 0x0000
• loop: addwf 0x20, W, A 4. Comment (Optional)
• loop: addwf 0x20, W, A ; add contents of WREG and file register
• ; the whole line is comment
Program Memory
• Used primarily in storing assembly instructions, although it can be used to store fixed data (lookup table later)
• Separate from data memory
• 21-bit address bus, 16-bit data bus
• Address up to 221=2M bytes of memory
• Not all memory locations are implemented
Program Memory
• Each PIC18 member has a 21-bit address bus.
• Can address up to 221=2M bytes program memory space.
• Implemented as Flash Memory (non-volatile)
• PIC18F452 implements only 32768 bytes, capable of storing 16384 instructions (most instructions are 2 bytes).
Placement of Instructions in Program Memory
• Most instructions are 2 bytes. A few instructions are 4 bytes.
Assembly Language Code
Program memory address
Program Counter (PC)
• Used by the CPU to point to the address of the instruction being fetched.
• 21-bit stored as 3 bytes PCL, PCH, PCU.
• Since most instructions are 2 bytes, PC increments by 2 in each instruction cycle.
Fetching and Execution in PIC18
• The instruction fetch stage gets the next instruction machine code from program memory.
• The execution stage does whatever the machine code calls for.
• Execution, which involves interaction with the data memory, does not interfere with fetching instruction from the program memory.
PIC18 Pipelining
• Instead of taking two instruction cycles to first fetch and execute an instruction, both can be accomplished in one instruction cycle.
• This mechanism is called pipelining.
Fetching and Execution Cycles
• Fetching Cycle
– Increment PC
– Fetch instruction into the instruction register (IR)
• Execution Cycle
– Decode instruction
– Read operands from data memory – Perform Arithmetic/Logic operation – Write the result to the destination.
Fetch-And-Execute: A Complete View
0000020846A
moaovdvfdw0lfwx020x5x2, 07W64,,A 5th inst.
0x326 0x36
Some important directives: EQU, SET
• EQU – associates a constant number with an address label.
• e.g., COUNT equ 0x25 ……….
movlw COUNT; [WREG] = 0x25
• SET – identical to EQU, but value assigned by SET
can be reassigned later.
• e.g., COUNT set 0x00
………..
COUNT set 0x25
……….
movlw COUNT; [WREG] = 0x25
• Note that [RegA] represents the value stored in the register RegA.
EQU and SET Directives
e.g., Move 22H into two file registers with addresses 0x05 and 0x06, add the contents of all three registers and put the result in WREG:
Without EQU
movlw 0x22 movwf 0x05, A movwf 0x06, A addwf 0x05, W, A addwf 0x06, W, A
FirstReg EQU 0x05 SecReg EQU 0x06
movlw 0x22
movwf FirstReg, A
movwf SecReg, A
addwf FirstReg, W, A
addwf SecReg, W, A
CBLOCK Directive
• Defines a list of named constants. • Format:cblock
• e.g.1,cblock0x50
test1, test2, test3, test4
• ValuesAssigned:
test1 = 0x50, test2 = 0x51,
test3 = 0x52, test4 = 0x53.
You should be able to …
• Describe the difference between machine code and assembly code
• Describe the difference between directives and assembly language instructions
• List the 4 elements of an assembly language statement
• Explain the program memory architecture in PIC18
• Examine program in the program memory window of MPLAB
• Describe the role of the program counter
• Describe the pipelining fetching and execution mechanism in PIC18
4.2 Unsigned and Signed Arithmetic, Logic Instructions
• Subtraction of unsigned number • Signed number arithmetic
• BCD addition
• Logic and compare instructions
Subtraction
• Subtraction uses 2’s complement
• In PIC18, four instructions are available for subtraction:
Instructions
subwf fileReg, d, a
subwfb fileReg, d, a subfwb fileReg, d, a
[WREG] = K – [WREG] [fileReg] – [WREG]
[fileReg] – [WREG] with Borrow
[WREG] – [fileReg] with Borrow
Subtraction for unsigned numbers
• e.g., movlw 0x23 sublw 0x3F
0011 1111 0010 0011
+ (2’s complement)
1 0001 1100
• Or a quicker way to get 2’s complement:
– Subtract F from the most (MSN) and least significant nibble (LSN):
– MSN: F-2 = D; LSN: F-3 = C. Result is DC.
– DC + 1 = DD, equivalent to this
• DC = 1, C = 1, Z = 0
• Rule: C = 1, Borrow = 0.
Subtraction for unsigned numbers
• How about this: 4C-6E? • i.e., movlw 0x6E
sublw 0x4C
+1001 0010 (2’s comp)
• In unsigned representation, we would not get a valid answer (which should be –ve). So how should we interpret our answer?
• You have a borrow (C=0). – i.e., 14C-6E = DE
Subtraction using subwf
• e.g., Compute 4C – 6E by using the subwf instruction.
• Note subwf = sub WREG from f = [f] – [WREG]
MyReg equ 0x20 movlw 0x4C
movwf MyReg, A movlw 0x6E
subwf MyReg, W, A
+1001 0010 (2’s comp)
Multi-byte Subtraction: subwfb
• Subtract 2515 by 1FFF (hex)
• Do the LSB subtraction
15 = 0001 0101
-FF -> 2’s complement = 01
LSB Result = 16
• Note C = 0, Borrow = 1
• Do the MSB subtraction 25 = 0010 0101
-1F -> 2’s complement = E1 MSB Result = 06
• Since we Borrow = 1 in LSB subtraction
• MSB Result = 06 -1 = 05
• Note C = 1, Borrow = 0
• Final Result = 05 16
Expected Result:
Multi-byte Subtraction: subwfb
• 2515 – 1FFF
Assembly Code
movlw 0xFF
sublw 0x15
movwf FirstReg, A
movlw 0x25
movwf SecondReg, A
movlw 0x1F
subwfb SecondReg, F, A [SecondReg] = 25-1F-Borrow
Pseudocode
[WREG] = 15-FF
[FirstReg] = [WREG] (Borrow=1)
Representation of Signed Number
• Signed 8-bit representation:
– D7 (MSB) represents sign : 1 if negative, 0 if positive
– D0-D6 represent the magnitude of the number.
• Positive number
– same as the unsigned number representation – ranges from 0 to 27-1 because 7 bits are used
• Negative number: 2’s complement
– Write the magnitude of the number as a unsigned 8-bit number
– Invert each bit
– Add 1 to it
8-bit Signed Number Representation
+127 ….. +2 +1 0 -1 -2 …. -127 -128
Binary Hex
0111 1111 7F ….. …..
0000 0010 02 0000 0001 01 0000 0000 00
1111 1111 FF 1111 1110 FE
…. …. 1000 0001 81 1000 0000 80
• e.g., movlw 0x82 addlw 0x22
1000 0010 (2’s comp) 0111 1110 0010 0010
1010 0100 (2’s comp) 0101 1100
Flags in STATUS register will be set as: – N = 1 (D7 = 1)
– OV = 0 (No overflow. Result is correct.)
– Rule: Negative number + Positive number → OV
Signed and unsigned additions
• The microcontroller does not know whether you are performing a signed or an unsigned addition. The result is the same either way.
• You can interpret an addition operation as a signed or unsigned operation.
• e.g., 82+22 always gives a result A4
– Unsigned: 82+22 = A4
– Signed: -7E(represented as 82)+22 = -5C (represented as A4). OV and N only make sense when an operation is interpreted as a signed operation.
Overflow in signed operations
• e.g., movlw D’96’ addlw D’70’
96 +70 -90
0100 0110 1010 0110
Flags in STATUS register will be set as: – N = 1 (D7 = 1)
– Sum = -90
Answer the following questions:
Show the status of the N and OV flag bits for
the following code:
(a) movlw 0x67 addlw 0x99 (b) movlw 0x44 addlw 0x60 (c) movlw 0x56
addlw 0x8F (d) movlw 0xFF
addlw 0xF2
Binary Coded Decimal (BCD) System
• All additions are performed in binary format in PIC18 MCU
• Decimal numbers can be encoded in binary-coded decimal (BCD) format
BCD decimal BCD
0000 0 0101 5
0001 1 0110 6
0010 2 0111 7
0011 3 1000 8
0100 4 1001 9
BCD Addition
• Binary addition of BCD numbers would not be correct if one of the following occurs:
1. If a sum digit is greater than 9 e.g., 24 36 55
+67 +47 +77 8B 7D CC
2. If a sum digit has a carry of 1 to the higher digit e.g., 29
BCD Addition
• Solution: Add 0x6 to these two types of sum digits.
e.g., 24 36 55 29 +67 +47 +77 +47
8B 7D CC 70 +6 +6+66 +6
91 83 132 76
• daw would do this for you. movf 0x10, W, A addwf 0x14, W, A
daw Instruction
• daw instruction adds 0x06 to the upper or lower byte if necessary.
• daw instruction works only on WREG
• Lower nibble: If the lower nibble (4 bits) is greater than 9 or if DC = 1, add 0x06 to the lower nibble.
• Upper nibble: If the higher nibble (4 bits) is greater than 9 or if C = 1, add 0x06 to the upper nibble.
Example: BCD Addition of 3 numbers
• e.g., Find the sum of the values 0x88, 0x69 and 0x97. Put the sum in file register 0x005 and 0x006.
H_byte equ 0x06 L_byte equ 0x05
org 0x00
clrf H_byte, A
clrf L_byte, A
movlw 0x88
addlw 0x69
incf H_byte, F, A
N_1: addlw 0X97
incf H_byte, F, A
Over:movwf L_byte, A
Multiplication
• PIC18 has two instructions for 8-bit multiplication: mulwf f and mullw k.
• The products are stored in the PRODH:PRODL register pair.
• The following instruction sequence performs 8-bit multiplication operation:
movf 0x10,W,A mulwf 0x11,A
Logic Instructions
• PIC18 provides instructions to perform logic operations such as AND, OR, Exclusive-OR and complement.
Instructions
andwf fileReg, d, a
AND K with [WREG]
AND [WREG] with [fileReg]
Or K with [WREG]
Or [WREG] with [fileReg]
Exclusive Or K with [WREG] Exclusive Or [WREG] with [fileReg] Complement [fileReg]
Produce 2’s complement of [fileReg]
iorlw iorwf xorlw xorwf comf negf
fileReg, d, a K
fileReg, d, a
fileReg, d, a fileReg, a
Compare instructions
• Compare instructions compare a value in the file register with the contents of the WREG register.
• Three instructions that compare [fileReg] with [WREG]:
Instructions
cpfsgt fileReg, a cpfseq fileReg, a cpfslt fileReg, a
Skip if [fileReg] > [WREG] Skip if [fileReg] = [WREG] Skip if [fileReg] < [WREG]
Example: cpfslt
• e.g. Write a program to find the greater of the VAL_1 and VAL_2 registers and place it in file register location 0x020.
MyReg equ 0x20 VAL_1 equ 0x00 VAL_2 equ 0x01
movf VAL_1, W, A;
[WREG]= [VAL_1]
cpfslt VAL_2, A;
;Is [VAL_2] < [WREG] =
movf VAL_2, W, A;
[WREG] = [VAL_2]
movwf MyReg, A;
[020] = [WREG]
• e.g., Suppose a value T is stored in the register 0x020. Put a value to the register 0x021 according to the following scheme:
If T = 75, If T > 75, If T < 75,
then [0x021] = 1 then [0x021] = 2 then [0x021] = 0
FileReg equ 0x20
Result equ 0x21
Main:movlw D'75' cpfsgt FileReg, A
bra LEQ GT: movlwD'2'
movwf Result, A
bra Over LEQ: movlw D'75'
cpfseq FileReg, A
EQ: movlwD'1'
movwf Result, A
bra Over LT: movlwD'0'
movwf Result, A
Over: .......
4.3 Looping and Branching
Looping in PIC
• Loop – repeating a sequence of instructions a certain number of times.
• e.g., To add 3 to [WREG] five times, I
movlw 0x00 addlw 0x03 addlw 0x03 addlw 0x03 addlw 0x03 addlw 0x03
• Disadvantage: Too much code space is needed if repeating 100 times
• Use looping
Three steps in writing a loop
• Step 1: Initialize variables
– Count: specifies how many times you want to repeat the loop. (e.g., [Count] = d’5’ in previous example)
– Other variables depending on application.
• Step 2: Identify statement(s) to repeat – In the previous example, it would be:
addlw 0x03
• Step 3: Determine whether to stop looping
– Strategy 1: Use decfsz Count to decrement Count after one iteration (repetition) of the loop, and check whether Count is 0. Two possibilities:
• If Count = 0 (i.e., finished the desire number of iterations), exit loop.
• If Count ≠ 0, branch back to Step 2.
decfsz instruction
• decfsz stands for DECrement File register and Skip if Zero.
• decfsz is a conditional skipping instruction, which skips the next instruction if a condition is satisfied (here if result is 0 after the decrement).
• Format: decfsz f, d, a
where f is the 8-bit address of the file register and d indicates the destination of decremented value: W – WREG, F – File Register
Looping using decfsz instruction
• e.g., Write a program to (a) initialize WREG to 0 (b) add 0x05 ten times to WREG and put the result in the PRODL register
count equ 0x00; Step 1 (Red)
movlw d‘10’
movwf count, A
movlw 0x00
AddMore:addlw 0x05; Step 2 (Green)
decfsz count, F, A; Step 3 (Blue) bra AddMore
movwf PRODL
Perform arithmetic operation using a loop
• Write a program to compute 1 + 2 + ... + 10 and save the sum at the data memory address 0x000.
• We will work on the three steps together and write code.
3-Step Plan
• Step 1: Initialization – [Count] = 10
– [Numi] = 1
– [Sum] = 0
• Step 2: Statements to repeat – [Sum] = [Sum] + [Numi]
– [Numi] = [Numi] + 1
• Step 3: decfsz Count
– [Count] = [Count] – 1
– Stop repetition if [Count] = 0
cblock 0x00 Count
org 0x000000
Initialization: movlw d'10'
movwf Count, A
movlw d'1'
movwf Numi, A
clrf Sum, A
movf Numi, W, A;
addwf Sum, F, A;
incf Numi, F, A;
decfsz Count, F, A;
;[Count] = [Count] - 1; skip if [Count] = 0; bra Here
[WREG] = [Numi]
[Sum] = [Sum] + [WREG] [Numi] = [Numi] + 1
Strategy 1 for Step 3 in Looping
decfsz count, F, A; Step 3 (Blue) bra AddMore
More analysis:
• decfsz is a conditional skipping instruction that skips the branching instruction (i.e., bra AddMore) if count = 0 after decrement (i.e., finished the number of iterations we want)
• bra AddMore is an unconditional branching instruction (i.e., if this instruction is executed, it always branches)
Strategy 2 for Step 3 in Looping
• Use a conditional branching instruction called bnz.
• bnz stands for Branch if the Z flag in the status register is zero (i.e., Not Zero)
– easy to get confused, but note:
• Result ≠ 0, Z = 0 → Branch is taken
• Result = 0, Z = 1 → Branch is not taken
• Whether the branch is taken is determined by whether a condition is satisfied (here, Z = 0)
• Format:bnzlabel
• e.g., Implement the loop in the last slide using bnz.
Comparison between Strategy 1 & 2
• Strategy 1: decfsz
count equ 0x00 movlw d‘10’
movwf count, A
movlw 0x00
AddMore:addlw 0x05
decfsz count, F, A goto AddMore movwf PRODL
count equ 0x00
movlw d‘10’
movwf count, A
movlw 0x00
AddMore:addlw 0x05
decf count, F, A bnz AddMore movwf PRODL
• Strategy 2: bnz
Other conditional branching instructions
• These instructions jumps when C and Z in the STATUS register are 1 or 0
– bnz: jump if Z = 0 (previously described) – bz: jump if Z = 1
– bnc: jump if C = 0
– bc: jump if C = 1
Example on bz
• e.g., Write a program to determine whether file register 0x30 contains a value other than 0x00. If not, put 0x00 in it.
fileReg equ 0x30 movf fileReg, F, A bz Next
movlw 0x00
movwf fileReg
Example on bnc
• e.g., Find the sum of the values 0x79, 0xF5 and 0xE2. Put the sum in file register 0x05 and 0x06.
H_byte equ 0x06
L_byte equ 0x05
org 0x0000 clrf H_byte, A clrf L_byte, A
movlw 0x79
addlw 0xF5
incf H_byte, F, A
N_1: addlw 0XE2
bnc Over
incf H_byte, F, A
Over:movwf L_byte, A
How does a conditional branching instruction know where to jump to?
• The instruction bnc label is interpreted as bnc n by the assembler, where n is a signed 1-byte number within -128 to 127.
• n is the Relative Address of the branching destination with respect to the current PC. n is expressed in number of instructions (i.e., relative address = 2n if expressed in address)
Because the target must be within 256 instructions of the
current PC, conditional branches are short jumps.
Program Memory of the bnc Example
• The label N_1 is one instruction away (at 0008) from the current PC (0006) when branching occurs.
• Opcode = E301 → jump 1 instruction (or 2 bytes from 0006 to 0008) if branching occurs.
How about bra?
– allocated 11 bits for storing the Relative
Address of the targeting instruction.
– bra can jump forward for a max. of 1023 instructions and backward for a max. of 1024 instructions.
Exercise on bra address encoding
Calculate the relative addresses (marked by “???”) encoded in the opcode shown below.
goto: Another unconditional branching instruction
• goto specifies the Absolute Address of the branching destination and can jump to
anywhere in the program memory.
• goto is a 4-byte (or 2-word) instruction.
Example of a 4-byte instruction: goto
• Why4-byte?
– The machine code must contain the address of the destination in the program memory (21-bit)
• Only the most significant 20 bits are included. Why?
– Program memory are organized as 2-byte blocks. LSB must be 0.
Machine code of goto
• The goto Main line in our previous example forces PC to 0x000004, where
the Main label is.
• The machine code is
Thus, the program goes to
0000 0000 0000 0000 0010 0 in binary (i.e., 0x000004 in hex)
Example for the goto instruction
• e.g., In our program, we want to branch to address 0x000020. What is the machine
code of the goto instruction?
Comparison among 3 types of branching instructions
Conditional
bc, bnc, bz, bnz,
bn, bnn, bov, bnov
Branch according to the whether a flag in the STATUS registered is raised.
Unconditional Branching
Branch unconditionally
The operand of these instructions specifies the address of the destination of the jump relative to the position of the next instruction
The operand of goto specifies the absolute address of the destination
Able to jump to anywhere in the program memory
Able to jump -128 to +127 lines with respect to current instruction
Able to jump -1024 to +1023 lines with respect to current instruction
Exercise on Relative/Absolute Addresses
Calculate the relative/absolute addresses (marked by “??”) encoded in the opcode shown in Lines 29, 37, 39 in the following program.
Memory Machine Address Code
00029 00030
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