Project Overview
What do you need to design
¡ñ 9-bit Processor:
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Instruction Set Architecture
(a) Instruction Set: Lab 1 (b) Architecture: Lab 2
¡ñ Program:
Machine Code: Lab 3
Instruction Set (Lab 1)
C code: A = B + C + D;
Assembly (MIPS):
add $t0, $s1, $s2 add $s0, $t0, $s3
Machine Code:
00000010001100100100000000100000 00000001000100111000000000100000
Different types of ISA
Architecture (Lab 2)
You might need LUT
Program 1: Encryption
256 Byte Data Memory, 1 Byte = 8 bit
DataMem[0: 51]: Original input Message
DataMem[61]: N of prepending space char
DataMem[62]: LFSR tap pattern
DataMem[63]: LFSR Starting State
DataMem[64:64+N]: Encrypted Prepending Space
DataMem[64+N:127]: Encrypted Message + Encrypted Appending Space
10 <= N <= 15
If N > 15, N = 15 If N < 10, N = 10
Dest[i] = (Source[i] - 0x20) ^ curr_LFSR
curr_LFSR = (curr_LFSR<<1)|(^(curr_LFSR & taps))
DataMem[64:128][7]: Parity Bit ¡ú ^[6:0] DataMem[64:128][6:0]: Encrypted Message
7 bit LFSR
Program 2: Decryption
DM[X] = DM[64+X] ^ curr_LFSR + 0x20
DataMem[0:63]: Decrypted Message
DataMem[64:127]: Encrypted Message
Use DM[64] to calculate LFSR starting state
Loop through all 9 LFSR Tap pattern, do the decryption, and compare with
DM[64:73], see which pattern is able to produce 10 ASCII space. Do the decryption
Program 3: Upgraded Decryption
You will basically repeat Program 2 with some additional refinement Difference with Program 2:
1. Remove all initial space, until a non space character. Then store the non space characters from DM[0](assuming no error)
2. Calculate the parity bit. Does DM[64 + X][7] == ^DM[64 + X][6:0]?
¡ñ If yes, then store the decrypted char into DM[X]
¡ñ If no, then store error flag 0x80 into DM[X]
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