Feedback on Quiz # 2 (Summative)
The Quiz # 2 was composed of 10 questions, which were randomly selected from a Question Bank of 21 questions. Answers and feedback comments for all of the questions are given below:
Q
The integers in the following computations are in hexadecimal and represent 32-bit two’s complement binary numbers. Perform the addition operation and indicate the correct answer? (5FCA5243)16 + (AE223464)16 = (?)16
(a)
(0DEC86A7)
16
(b)
(10DEC86A7)16
(c)
(60528707)16
(d)
(180FC87A7)16
Feedback:
5FCA5243
+ AE223464
—————
(1)0DEC86A7
There is an overflow and the overflow bit will be ignored. So the correct answer is (0DEC86A7)16
Q
The integers in the following computations are in hexadecimal and represent 32-bit two’s complement binary numbers. Perform the addition operation and indicate the correct answer? (E3BA265F)16 + (E045B9A9)16 = (?)16
(a)
(C3FFE008)
16
(b)
(1C3FFE008)16
(c)
(284664674)16
(d)
(C3FFDFF8)16
Feedback:
E3BA265F
+ E045B9A9
—————
(1)C3FFE008
There is an overflow and the overflow bit will be ignored. So the correct answer is (C3FFE008)16
Q
A 32-bit computer system has 4 GB of memory installed in it these represent addresses (00000000)16 – (FFFFFFFF)16. However, the system programmer is told that she can only use memory from (4A400000)16 to (B9C00000)16. The memory from (00000000)16-(4A400000)16 is unavailable and the memory above (B9C00000)16 is also unavailable.
How much memory is available to the system programmer?
(a)
1644 MB
(b)
1784 MB
(c)
1848 MB
(d)
1988 MB
Feedback:
B9C00000
− 4A400000
—————
6F800000
(6F800000)16 = (1870659584)10
1870659584 / (1024*1024) = 1784 MB
Q
A 32-bit computer system has 4 GB of memory installed in it and these represent addresses (00000000)16- (FFFFFFFF)16. However, the system programmer is told that she can only use
memory from the following two regions: (00000000)16 to (4A400000)16
(B9C00000)16 to (FFFFFFFF)16
The memory from (4A400000)16 to (B9C00000)16 is unavailable. How much memory is available to the system programmer?
(a)
2312 MB
(b)
2584 MB
(c)
1188 MB
(d)
1784 MB
Feedback:
Lets compute the size of memory region #1:
4A400000
− 00000000
———–
4A400000
(4A400000)16 = (1245708288)10 1245708288 / (1024*1024) = 1188 MB
Lets compute the size of memory region #2:
FFFFFFFF
− B9C00000
———–
463FFFFF
(463FFFFF+1)16 = (1178599424)10 1178599424 / (1024*1024) = 1124 MB
So the total available memory is: 1188 MB + 1124 MB = 2312 MB
Q
You are in a strange world, where modified six-sided dice are used to represent numbers (like in base 6 system). Each side of the dice has the following side-to-number mapping:
You are required to compute the following subtraction using the dice-to-number mapping given above and assuming you are working in the base-6 number system, and choose the correct option from the given choices.
0
1
2
3
4
5
(a)
(b)
(c)
(d)
_
?
Feedback:
The question is equivalent to the following in base-6
5404 – 1053 => 4311
So the final answer is (4311)6
Q
You are in a strange world, where modified six-sided dice are used to represent numbers (like in base 6 system). Each side of the dice has the following side-to-number mapping:
You are required to compute the following subtraction using the dice-to-number mapping given above and assuming you are working in the base-6 number system, and choose the correct option from the given choices.
0
1
2
3
4
5
(a)
(b)
(c)
(d)
_
?
Feedback:
The question is equivalent to the following in base-6
3142 – 2044 => 1054
So the final answer is (1054)6
Q
An address space is a range of valid addresses in memory that are available for a program or process. That is, it is the memory that a program or process can access. This memory is used for executing program instructions and storing data.
Considering a system with 48-bit memory address size, find out the maximum memory that could be installed in such a system?
Memory Units (for reference)
(a)
256 Terra Bytes
(b)
2048 Giga Bytes
(c)
262144 Mega Bytes
(d)
281.47 Terra Bytes
Feedback:
Considering we have a 48-bit system, the total number supported addresses is 2^48 = 2.814749767×1014
Now, lets see how much this space is, once we convert it to memory units:
2.814749767×1014 / 1024 = 274877906944 KB 274877906944 KB / 1024 = 268435456 MB 268435456 MB / 1024 = 262144 GB
262144 GB / 1024 = 256 TB
Q
Consider that you are designing a world-wide database for keeping the passport records of every human being alive on earth. Let’s assume that the current human population is approx. 8 billion people. For each person, you will be keeping the following information in your database:
Estimate the total amount of space that you will need to store the above information for all the people alive on earth today?
Database Field
Space Required
Memory Units (for reference)
Passport Type
2 bytes
Passport Number
10 bytes
First Name
50 bytes
Last Name
50 bytes
Nationality
50 bytes
Date of Birth
8 bytes
Expiry Date
8 bytes
(a)
1.30 Tera Bytes
(b)
1.42 Tera Bytes
(c)
10.36 Tera Bytes
(d)
1.33 Giga Bytes
Feedback:
Considering we have approx 8 billion people i.e. 8 x 109 and we need to store the above information for each person. We will need to store:
2 + 10 + 50 + 50 + 50 + 8 + 8 = 178 bytes for every person. So the total amount of space needed is:
178 x 8 x 109 = 1.424×1012 bytes
Now, lets see how much this space is, once we convert it to memory units: 1.424×1012 / 1024 = 1390625000 KB
1390625000 KB / 1024 = 1358032.22 MB
1358032.22 MB / 1024 = 1326.20 GB
1326.20 GB / 1024 = 1.30 TB (approx)
Q
You have been assigned the task to design a banking application for Bitcoin (BTC) trading. You will be dealing with bank accounts with balances in millions of Bitcoins. Your bank is very worried about the rounding errors and wants to minimize them. The Satoshi to bitcoin ratio is 100 million Satoshis to one bitcoin, and your bank wants you to account for each Satoshi in the banking application.
Which data type will you choose for dealing with the Bitcoin currency amounts in your application? Please also note that the Bitcoin balance can be negative.
(a)
32-bit integers
(b)
64-bit long integers
(c)
32-bit floating point numbers
(d)
64-bit double floating-point numbers
Feedback:
We will not use either of the floating point and double data types, as these have rounding errors and are not suitable for banking applications (as discussed in the lectures)
We would like to use 32-bit integers, if possible. Lets see if we can use them.
We can represent approx 2^31 numbers in 32-bits (also allowing for -ve ones). Therefore, we can account for 2^31 Satoshis, which is = 2147483648 Satoshis (approx)
In terms of bitcoins, we can manage: 2147483648 / (10^6) = 2147.483648 bitcoins, and this is not enough for the application, as we would like deal with millions of bitcoins.
Lets see if 64-bit integers is good enough?
We can represent approx 2^63 numbers in 64-bits (also allowing for -ve ones). Therefore, we can account for 2^63 Satoshis, which is = 9.223372037×1018 Satoshis (approx)
In terms of bitcoins, we can manage: 9.223372037×1018 / (10^6) = 9.223372037×1012 bitcoins, and this is much more (about 9.22 trillion) than what we need for this application, so we can safely choose this data type.
Q
Google have been estimated as having a total storage capacity of about 16 exabytes. We didn’t get as far as the exabyte during our
lectures, but it’s 1018 bytes. If Google’s storage were made into a single byte- addressed memory, how many bits would the addresses have to be to reference every byte in such a memory system?
Memory Units (for reference)
(a)
32-bit addresses
(b)
48-bit addresses
(c)
64-bit addresses
(d)
80-bit addresses
Feedback:
As stated in the question, one exabyte is = 1018 bytes
We know the following approximations from our lectures:
103 ~= 210, 106 ~= 220, 109 ~= 230, … , 1018 ~= 260
Google has approximately 16 exabytes i.e. 16 x 1018 bytes
We can approximate this in binary as 24 x 260 = 264
Therefore, a computer system with 64-bit addresses should be good enough to address all of this memory at byte level.
Q
The actual data is transferred between the components of a computer using:
(a)
Registers
(b)
Data Bus
(c)
Address Bus
(d)
Control Bus
Feedback:
The data bus is used to transfer (read / write) data (from / to) memory in a computer system. The address bus carries the addresses of all data / instructions and the control bus is used for sending control signals to different devices in the system.
Q
If the clock speed of a processor is increased from 1GHz to 2GHz:
(a)
The number of instructions executed per second will increase, but by less than 2 times
(b)
The number of instructions executed per second will double
(c)
The number of instructions executed per second will stay the same
(d)
An error will be signaled
Feedback:
The impact of clock speed on instruction execution is significant but it will not be exactly twice, as many factors such as pipelining, branch instructions, procedure calls will lower the CPU performance. Therefore, increasing the clock speed from 1GHz to 2GHz will increase the number of instructions executed per second, but these will be less than 2 times.
Q
Which type of memory is the fastest out of the following?
(a)
Processor Registers
(b)
RAM (Random Access Memory)
(c)
Secondary Disk Storage
(d)
Cache Memory
Feedback:
Processor registers are also a type of memory. These are on the CPU chip, therefore they are the fastest kind of memory available in a computer system.
Q
What is the name of the phase of instruction execution which loads the next instruction from memory:
(a)
Instruction Fetch
(b)
Data Fetch
(c)
Instruction Execution
(d)
Instruction Execution
Feedback:
The instruction fetch stage loads the next instruction from memory into a CPU register (the Instruction Register) for execution.
Q
(a)
(b)
(c)
(d)
What is the main difference between the Von Neumann architecture and the Harvard architecture. Select one of the following:
Harvard architecture separates memory space for data and instructions.
Both models are similar except the way they access the ALU
Harvard architecture employs a single bus to both fetch instructions from memory and transfer data from one part of a computer to another
In a Von Neumann architecture, there is no need to make the two memories share characteristics.
Feedback:
In the Von Neumann architecture, both instructions and data are stored in the same memory. Harvard architecture puts instructions and data in different memory spaces. This is the key difference between these two architectures.
Q
Which of the following statements are relevant to Data / Operand Fetch (DF/OF)
(a)
Bits at specified memory locations are copied into locations in the ALU circuitry
(b)
Bits of instruction are placed into the decoder circuit of the Control Unit
(c)
The destination address for the Result Return step will be identified and placed in the RR circuit
(d)
Compute the result of the operation in the ALU
(e)
Once the result is stored, the cycle begins again
Feedback:
In the data / operand fetch stages, bits at specified memory locations are copied into locations in the ALU circuitry.
Q
Which of the following statements are relevant to Instruction Decode (ID) stage
(a)
The destination address for the Result Return step and places the address in the RR circuit
(b)
Bits of instruction are placed into the decoder circuit of the Control Unit
(c)
Bits at specified memory locations are copied into locations in the ALU circuitry
(d)
Compute the result of the operation in the ALU
(e)
Once the result is stored, the cycle begins again
Feedback:
The instruction decode stage, decodes the destination address for the Result Return step and places the address in the RR circuit.
Q
Consider that register $3 contains the value 160 and we execute the following MIPS instruction:
xori $5, $3, 100
What will be result that will be placed in register $5 after the execution of the above instruction? You can consult the following MIPS instructions for this question.
(a)
(196)
10
(b)
(160)10
(c)
(100)10
(d)
(228)10
Feedback:
The xori instruction is used to take Exclusive OR between the register $3 and 100 (an immediate value) and place the result in register $5. In this particular instance, we get the result (196)10 placed in register $5.
In binary:
1010 0000 = (160)10 0110 0100 = (100)10 ————————– 1100 0100 => (196)10
Q
Which of the following MIPS instructions can be used to add the value (14)10 to the value in register $1 and place the result in register $2
You can consult the following MIPS instructions for this question.
(a)
addi $2, $1, 0xE
(b)
add $2, $2, $1
(c)
addu $2, $1, $2
(d)
add $2, $1, 14
(e)
addiu $1, 0xE, $2
Feedback:
The add immediate (addi) instruction is used to add a register and an immediate value and place the result in the destination register. So the correct answer is addi $2, $1, 0xE
The instruction add $2, $1, 14 is incorrect, as add requires all of its operands to be registers, whereas we want to add a register with an immediate value.
Q
Why does a processor have a set of registers in addition to a large main memory?
(a)
Registers provide much faster access to data values as compared to RAM
(b)
The registers are cheaper than RAM, so it’s good to have them.
(c)
The registers can store instructions permanently as compared to RAM, which is volatile.
(d)
The CPU needs to keep the RAM for holding temporary instructions
(e)
CPU registers have a big amount of data storage, that facilitates the CPU operations.
Feedback:
Registers are the fastest possible memory as these are located on the same chip as the CPU; these are used to perform all computations in a typical RISC architecture. Registers are not cheap, and they are also volatile. Registers are however very limited in memory space, typically a few 10s of registers are found on a CPU e.g. 32 registers on MIPS CPUs.
Q
A processor instruction must normally (except jump instructions) specify (choose all that apply):
(a)
The location to store the result
(b)
The operation to be performed
(c)
The locations of the operands
(d)
The number of cycles that it will take to execute
(e)
The type of the result produced
(f)
The address of the next instruction
(g)
What to do if an error occurs
Feedback:
Each instruction specifies the operation to be performed, its operands (and their locations i.e. which registers / immediate values to use) and the location of the destination (where to store the results).
All other kind of information is not available in the instruction i.e. the number of cycles is not mentioned in the instruction, the type of result produced is also not evident from the instruction, and similarly an instruction does not specify the address of the next instruction (unless its a jump instruction) and it does not tell us what to do if an error occurs.