Reconfigurable computing
Small Embedded Systems
Unit 3.6 Timer Interrupts using AVR
Special Function Registers
Timers are based on counters
Counter runs through a count sequence
When it reaches its maximum value, it overflows and resumes from 0
Maximum value is determined by bit width of counter:
8-bit counter 0..255
16-bit counter 0..65,535
32-bit counter 0..4,294,967,295
Timer/Counters
Counter value
Timer can generate a response (e.g. interrupt) when:
It overflows
Timer/Counters
Counter value
Interrupt
Interrupt
Interrupt
Interrupt
Timer can generate a response (e.g. interrupt) when:
It becomes equal to value held in a compare register
Counter may be allowed to continue with its count:
Or it may be reset to zero, giving controllable rate:
Timer/Counters
Counter value
Comparator value
Counter value
Interrupt
Interrupt
Interrupt
Interrupt
Comparator value
Int
Int
Int
Int
Int
Int
Incrementing on each processor clock cycle is often too fast to be useful
Timer clock can be set to be processor clock divided by a power of 2
Example:
We want to generate an interrupt every 0.5 s on a processor using a 16 MHz clock (period 62.5 ns)
Set clock divider to 256
Timer increments every 256 × 62.5 × 10-9 s = 16 ms
Set compare register to = 31,250
Too big for an 8-bit register, so must use 16-bit counter
Timer/Counters
Three timers are available:
TCNT0 8-bit
TCNT1 16-bit
TCNT2 8-bit
Each of these has two compare registers
OCR0A, OCR0B
OCR1A, OCR1B
OCR2A, OCR2B
ATmega 328P Timer/Counters
Each counter has this structure:
ATmega 328P Timer/Counters
Count rate selection
Counter value
Compare register A
Compare register B
Interrupt
Timer Interrupt Example
Let’s get our LED to flip at 0.5 second intervals
We’ve already seen that we need
Our clock divided by 256
A 16-bit compare register set to 31,250
Timer Interrupt Example
Timer x is controlled by two registers:
TCCRxA – we don’t need this; we’ll set it to 0
Timer Interrupt Example
Timer x is controlled by two registers:
TCCRxA – we don’t need this; we’ll set it to 0
TCCRxB – set clock rate – divide by 256
TCCR1A = 0;
TCCR1B |= (1<