Rosetta Demostrator Project MASC, Adelaide University and Ashenden Designs
COMPUTER ORGANIZATION AND DESIGN
The Hardware/Software Interface
5th
Edition
Chapter 1
Computer Abstractions
and Technology
Chapter 1 — Computer Abstractions and Technology — 2
The Computer Revolution
Progress in computer technology
Underpinned by Moore’s Law*
Makes novel applications feasible
Computers in automobiles
Cell phones
Human genome project*
World Wide Web*
Search Engines
Computers are pervasive
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(IC resources double every
______ months)
( ______’s law: memory capacity
doubles every ____ months)
(Allows ___________ medical care)
(Web 1.0 Web ___ Web ___ ( __________ web))
(gnome: ____ _______ _______ _____ ___________ ) *
Chapter 1 — Computer Abstractions and Technology — 3
Classes of Computers
Personal computers
General purpose, variety of software*
Subject to cost/performance tradeoff
Server computers
Network based
High capacity, performance, reliability
Range from small servers to building sized
Classes of Computers
Supercomputers
High-end scientific and engineering
calculations
Highest capability but represent a small
fraction of the overall computer market
Embedded computers*
Hidden as components of systems
Stringent power/performance/cost constraints
*
Chapter 1 — Computer Abstractions and Technology — 4
(Processor core: processor written in ____, allowing integration with other ___ on a single chip)
Chapter 1 — Computer Abstractions and Technology — 5
The PostPC Era
The PostPC Era
Chapter 1 — Computer Abstractions and Technology — 6
Personal Mobile Device (PMD)
Battery operated
Connects to the Internet*
Hundreds of dollars
Smart phones, tablets, electronic glasses
Cloud computing*
Warehouse Scale Computers (WSC)*
Software as a Service (SaaS)*
Portion of software run on a PMD and a
portion run in the Cloud
Amazon and Google
(Wireless; apps; heptics and speech input)
(Public/Private/________)
Chapter 1 — Computer Abstractions and Technology — 7
What You Will Learn
How programs are translated into the
machine language
And how the hardware executes them
The hardware/software interface
What determines program performance
And how it can be improved
How hardware designers improve
performance*
What is parallel processing*
(Multicore microprocessor)
(Energy efficiency)
Chapter 1 — Computer Abstractions and Technology — 8
Understanding Performance
Algorithm
Determines number of operations executed
Programming language, compiler, architecture
Determine number of machine instructions executed
per operation
Processor and memory system
Determine how fast instructions are executed
I/O system (including OS)
Determines how fast I/O operations are executed
Eight Great Ideas
Design for Moore’s Law*
Use abstraction to simplify design* *
Make the common case fast
Performance via parallelism
Performance via pipelining
Performance via prediction*
Hierarchy of memories*
Dependability via redundancy
Chapter 1 — Computer Abstractions and Technology — 9
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(Design for the technology available when the design ________ )
(Information _______; OO design)
( ______ )
(Asking for forgiveness is better than asking for ____________ )
(Top: fastest/smallest/______ expensive)
Chapter 1 — Computer Abstractions and Technology — 10
Below Your Program
Application software
Written in high-level language
System software
Compiler: translates HLL code to
machine code
Operating System: service code
Handling input/output
Managing memory and storage
Scheduling tasks & sharing resources
Hardware
Processor, memory, I/O controllers
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Chapter 1 — Computer Abstractions and Technology — 11
Levels of Program Code
High-level language
Level of abstraction closer
to problem domain
Provides for productivity
and portability
Assembly language
Textual representation of
instructions
Hardware representation
Binary digits (bits)
Encoded instructions and
data
(Microprocessor
wIthout Pipeline _____ )
(Million Instructions Per ______ )
Chapter 1 — Computer Abstractions and Technology — 12
Components of a Computer
Same components for
all kinds of computer
Desktop, server,
embedded
Input/output includes
User-interface devices
Display, keyboard, mouse
Storage devices
Hard disk, CD/DVD, flash
Network adapters
For communicating with
other computers
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The BIG Picture
Chapter 1 — Computer Abstractions and Technology — 13
Touchscreen
PostPC device
Supersedes keyboard
and mouse
Resistive and
Capacitive types
Most tablets, smart
phones use capacitive
Capacitive allows
multiple touches
simultaneously
Chapter 1 — Computer Abstractions and Technology — 14
Through the Looking Glass
LCD screen: picture elements (pixels)
Mirrors content of frame buffer memory
Chapter 1 — Computer Abstractions and Technology — 15
Opening the Box*
Capacitive multitouch LCD screen
3.8 V, 25 Watt-hour battery
Computer board
(Wi-Fi, _________ )
(camera, _________)
(Gyroscope, _______meter)
(Speaker)
(iPad 2 A1395 tablet PC, _____ )
( _____ ARM cores, ___Hz, ______ DRAM
of ___nsec and $5/GB)
( ____ flash memory) (Power and I/O
controller)
(Most recent one (2016): ______ _______ )
Chapter 1 — Computer Abstractions and Technology — 16
Inside the Processor (CPU)
Datapath: performs operations on data
Control: sequences datapath, memory, …
Cache memory
Small fast SRAM memory for immediate
access to data
Chapter 1 — Computer Abstractions and Technology — 17
Inside the Processor
Apple A5*
(12.1 x 10.1 mm; _____ process; iPad 2; iPhone 4S; _____ )
( _______ SoC; ____Hz)
Chapter 1 — Computer Abstractions and Technology — 18
Abstractions
Abstraction helps us deal with complexity
Hide lower-level detail
Instruction set architecture (ISA)
The hardware/software interface
Application binary interface
The ISA plus system software interface
Implementation*
The details underlying and interface
The BIG Picture
(HW obeying the architecture abstraction)
Chapter 1 — Computer Abstractions and Technology — 19
A Safe Place for Data
Volatile main memory*
Loses instructions and data when power off
Non-volatile secondary memory
Magnetic disk*
Flash memory*
Optical disk (CDROM, DVD)
( ___sec access time, $____/GB)
( ___sec access time, $____/GB; standard for
PMD; wear out after 500,000 _______ )
( _____ )
(SD( ______ Digital) card/
MMC( _________ card)
Chapter 1 — Computer Abstractions and Technology — 20
Networks
Communication, resource sharing,
nonlocal access*
Local area network (LAN): Ethernet*
Wide area network (WAN): the Internet
Wireless network: WiFi, Bluetooth*
(cost proportional to speed and _________ )
(a few ___; ____/sec)
(over 100’s km; ______ ______ )
(IEEE 802.___; ______/sec)
(IEEE 802.15.1; _____/sec)
Chapter 1 — Computer Abstractions and Technology — 21
Technology Trends
Electronics
technology
continues to evolve
Increased capacity
and performance
Reduced cost
Year Technology Relative performance/cost
1951 Vacuum tube 1
1965 Transistor 35
1975 Integrated circuit (IC) 900
1995 Very large scale IC (VLSI)* 2,400,000
2013 Ultra large scale IC 250,000,000,000
DRAM capacity
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( ________ transistors)
( __ times/3 yrs)
( __ times/3 yrs)
Semiconductor Technology
Silicon: semiconductor
Add materials to transform properties:
Conductors
Insulators
Switch
Chapter 1 — Computer Abstractions and Technology — 22
Chapter 1 — Computer Abstractions and Technology — 23
Manufacturing ICs
Yield: proportion of working dies per wafer
( ______ diameter; _______ long)
(< ______ thick)
Chapter 1 — Computer Abstractions and Technology — 24
Intel Core i7 Wafer
300mm wafer, 280 chips, 32nm technology
Each chip is 20.7 x 10.5 mm
( __Cores; ___ Threads; ____GHz ; _____ Cache )
($_____ )
Chapter 1 — Computer Abstractions and Technology — 25
Integrated Circuit Cost
Nonlinear relation to area and defect rate
Wafer cost and area are fixed
Defect rate determined by manufacturing process
Die area determined by architecture and circuit design
2
area/2)) Diearea per (Defects(1
1
Yield
area Diearea Wafer waferper Dies
Yield waferper Dies
waferper Cost
die per Cost
(High volume reduces the cost of a chip due to higher _____ and lower __________ cost per die)
Chapter 1 — Computer Abstractions and Technology — 26
Defining Performance
Which airplane has the best performance?
0 100 200 300 400 500
Douglas
DC-8-50
BAC/Sud
Concorde
Boeing 747
Boeing 777
Passenger Capacity
0 2000 4000 6000 8000 10000
Douglas DC-
8-50
BAC/Sud
Concorde
Boeing 747
Boeing 777
Cruising Range (miles)
0 500 1000 1500
Douglas
DC-8-50
BAC/Sud
Concorde
Boeing 747
Boeing 777
Cruising Speed (mph)
0 100000 200000 300000 400000
Douglas DC-
8-50
BAC/Sud
Concorde
Boeing 747
Boeing 777
Passengers x mph
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(Different for passenger and airplane designer)
Chapter 1 — Computer Abstractions and Technology — 27
Response Time and Throughput
Response time*
How long it takes to do a task
Throughput*
Total work done per unit time*
e.g., tasks/transactions/… per hour
How are response time and throughput affected
by
Replacing the processor with a faster version?
Adding more processors?
We’ll focus on response time for now…
*
(Important for _________ _____ )
(Important for _______ ___________ )
(Also called _________ time; depends on memory and disk access time, OS overhead, CPU speed, etc)
( ________ )
(Both response time and throughput _______ )
( _________ increases)
( _______ )
( _______ )
Chapter 1 — Computer Abstractions and Technology — 28
Relative Performance
Define Performance = 1/Execution Time
“X is n time faster than Y”
n
XY
YX
time Executiontime Execution
ePerformancePerformanc
Example: time taken to run a program
10s on A, 15s on B
Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
So A is 1.5 times faster than B
Chapter 1 — Computer Abstractions and Technology — 29
Measuring Execution Time
Elapsed time
Total response time, including all aspects
Processing, I/O, OS overhead, idle time
Determines system performance
CPU time
Time spent processing a given job
Discounts I/O time, other jobs’ shares
Comprises user CPU time and system CPU
time
Different programs are affected differently by
CPU and system performance
Chapter 1 — Computer Abstractions and Technology — 30
CPU Clocking*
Operation of digital hardware governed by a
constant-rate clock
Clock (cycles)
Data transfer
and computation
Update state
Clock period
Clock period: duration of a clock cycle
e.g., 250ps = 0.25ns = 250× 10–12s
Clock frequency (rate): cycles per second
e.g., 4.0GHz = 4000MHz = 4.0× 109Hz
(Clock cycle, clock rate)
Chapter 1 — Computer Abstractions and Technology — 31
CPU Time
Performance improved by
Reducing number of clock cycles
Increasing clock rate
Hardware designer must often trade off clock
rate against cycle count
Rate Clock
Cycles Clock CPU
Time Cycle ClockCycles Clock CPUTime CPU
(for a program) (for a program)
Chapter 1 — Computer Abstractions and Technology — 32
CPU Time Example
Computer A: 2GHz clock, 10s CPU time
Designing Computer B
Aim for 6s CPU time
Can do faster clock, but causes 1.2 × clock cycles
How fast must Computer B clock be?
4GHz
6s
1024
6s
10201.2
Rate Clock
10202GHz10s
Rate ClockTime CPUCycles Clock
6s
Cycles Clock1.2
Time CPU
Cycles Clock
Rate Clock
99
B
9
AAA
A
B
B
B
Chapter 1 — Computer Abstractions and Technology — 33
Instruction Count and CPI
Instruction Count for a program
Determined by program, ISA and compiler
Average cycles per instruction
Determined by CPU hardware*
If different instructions have different CPI
Average CPI affected by instruction mix
Rate Clock
CPICount nInstructio
Time Cycle ClockCPICount nInstructioTime CPU
nInstructio per CyclesCount nInstructioCycles Clock
(Average)
( ___ )
( ___________ )
Chapter 1 — Computer Abstractions and Technology — 34
CPI Example
Computer A: Cycle Time = 250ps, CPI = 2.0
Computer B: Cycle Time = 500ps, CPI = 1.2
Same ISA
Which is faster, and by how much?
1.2
500psI
600psI
A
Time CPU
B
Time CPU
600psI500ps1.2I
B
Time Cycle
B
CPICount nInstructio
B
Time CPU
500psI250ps2.0I
A
Time Cycle
A
CPICount nInstructio
A
Time CPU
A is faster…
…by this much
Chapter 1 — Computer Abstractions and Technology — 35
CPI in More Detail
If different instruction classes take different
numbers of cycles
n
1i
ii
)Count nInstructio(CPICycles Clock
Weighted average CPI
n
1i
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Count nInstructio
Count nInstructio
CPI
Count nInstructio
Cycles Clock
CPI
Relative frequency
Chapter 1 — Computer Abstractions and Technology — 36
CPI Example
Alternative compiled code sequences using
instructions in classes A, B, C
Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1
Sequence 1: IC = 5
Clock Cycles
= 2× 1 + 1× 2 + 2× 3
= 10
Avg. CPI = 10/5 = 2.0
*
Sequence 2: IC = 6
Clock Cycles
= 4× 1 + 1× 2 + 1× 3
= 9
Avg. CPI = 9/6 = 1.5
(Which one is faster?)
Chapter 1 — Computer Abstractions and Technology — 37
Performance Summary
Performance depends on
Algorithm: affects IC, possibly CPI
Programming language: affects IC, CPI
Compiler: affects IC, CPI
Instruction set architecture: affects IC, CPI, Tc
The BIG Picture
cycle Clock
Seconds
nInstructio
cycles Clock
Program
nsInstructio
Time CPU
(IC depends on the architecture, not ___________ )
(All the three factors need to be considered together for fair comparison)
(If an algorithm uses more divides than multiplications, it will cause a ______ CPI)
(The more indirect calls due to data abstraction, the ______ CPI)
(Loop unrolling for ________ CPI)
(IPC: Instructions per ______ _______ )
(Intel Core i7 Turbo mode)
Chapter 1 — Computer Abstractions and Technology — 38
Power Trends
In CMOS IC technology*
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FrequencyVoltageload CapacitivePower
2
× 1000 × 30 5V → 1V
(Slow down due to the limit
in _______ )
(dynamic energy consumption due to _________ )
(Joule/second)
(depends on fanout and technology)
Chapter 1 — Computer Abstractions and Technology — 39
Reducing Power
Suppose a new CPU has
85% of capacitive load of old CPU
15% voltage and 15% frequency reduction
0.520.85
FVC
0.85F0.85)(V0.85C
P
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old
2
oldold
old
2
oldold
old
new
The power wall
We can’t reduce voltage further*
We can’t remove more heat*
How else can we improve performance?
(With too low voltage, too leaky;
___% of power consumption is
static due to leakage)
(Cooling fan, turning off part of chip,
hundreds pins for power and ______, etc)
(Warehouse scale computer)
Chapter 1 — Computer Abstractions and Technology — 40
Uniprocessor Performance
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Constrained by power, instruction-level parallelism,
memory latency
(SPECint
benchmark)
Chapter 1 — Computer Abstractions and Technology — 41
Multiprocessors
Multicore microprocessors
More than one processor per chip*
Requires explicitly parallel programming
Compare with instruction level parallelism
Hardware executes multiple instructions at once
Hidden from the programmer
Hard to do
Programming for performance
Load balancing*
Optimizing communication and synchronization
*
(since _____ )
(Pipelining)
(Scheduling)
(The more processors, the more ________ )
Chapter 1 — Computer Abstractions and Technology — 42
SPEC CPU Benchmark
Programs used to measure performance
Supposedly typical of actual workload
Standard Performance Evaluation Corp (SPEC)*
Develops benchmarks for CPU, I/O, Web, …
SPEC CPU2006
Elapsed time to execute a selection of programs
Negligible I/O, so focuses on CPU performance
Normalize relative to reference machine
Summarize as geometric mean of performance ratios
CINT2006 (integer) and CFP2006 (floating-point)
n
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ratio time Execution
(Workload: a set of ________ run on a computer, actual applications or mix of real programs)
(Benchmark: a program selected for use in _________ computer performance)
(‘89)
(12 benchmarks) (17 benchmarks)
n
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Time Weight
(For execution time) (For rate)
n
1 i i
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Rate
Weight
1
Chapter 1 — Computer Abstractions and Technology — 43
CINT2006 for Intel Core i7 920
(9770/508)
(Reference independence with geometric mean)
(0.44 ~ 2.66; difference of a factor of 5)
Chapter 1 — Computer Abstractions and Technology — 44
SPEC Power Benchmark
Power consumption of server at different
workload levels
Performance: ssj_ops/sec
Power: Watts (Joules/sec)
10
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powerssj_ops Wattper ssj_ops Overall
(Operations per second)
Chapter 1 — Computer Abstractions and Technology — 45
SPECpower_ssj2008 for Xeon X5650
(2.66GHz, 16MB, 100GB SSD)
Chapter 1 — Computer Abstractions and Technology — 46
Pitfall: Amdahl’s Law
Improving an aspect of a computer and
expecting a proportional improvement in
overall performance
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unaffected
affected
improved
T
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T
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Example: multiply accounts for 80s/100s
How much improvement in multiply performance to
get 5× overall?
Corollary: make the common case fast
(Law of ___________ return; the return is limited by the portion of the improvement is applied)
Chapter 1 — Computer Abstractions and Technology — 47
Fallacy: Low Power at Idle
Look back at i7 power benchmark
At 100% load: 258W
At 50% load: 170W (66%)
At 10% load: 121W (47%)
Google data center
Mostly operates at 10% – 50% load
At 100% load less than 1% of the time
Consider designing processors to make
power proportional to load * (Energy-proportional computing)
Chapter 1 — Computer Abstractions and Technology — 48
Pitfall: MIPS as a Performance Metric
MIPS: Millions of Instructions Per Second
Doesn’t account for
Differences in ISAs between computers
Differences in complexity between instructions
6
6
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10CPI
rate Clock
10
rate Clock
CPIcount nInstructio
count nInstructio
10time Execution
count nInstructio
MIPS
CPI varies between programs on a given CPU
(Usually the larger the better)
Chapter 1 — Computer Abstractions and Technology — 49
Concluding Remarks
Cost/performance is improving
Due to underlying technology development
Hierarchical layers of abstraction
In both hardware and software
Instruction set architecture
The hardware/software interface
Execution time: the best performance
measure*
Power is a limiting factor
Use parallelism to improve performance
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(Others are valid in a limited context or requires preconditions)