PowerPoint Presentation
TU856-1 & TU858-1 Computer Architecture and Technology
Module Code: CMPU 1006
SEQUENTIAL LOGIC
Presenter: Dr Art Sloan
Semester 1, Week 6
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Presentation Outline
This presentation is a delve into the uses of logic gates and other circuits for the practical application of microchip architectures.
It will focus on latches and flip-flops of microelectronic circuitry, as these have a structural ability to help manage signal flow and logical operations. These signals and logical operations are the basis of software instructions an data.
There is a general comparison of logic gate combinations for different purposes.
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Presentation Content – including
Logic Types
Ingredients: Gates
CPU Clock
What is a Latch?
What is a Flip-Flop?
Difference Between Latches and Flip-Flops
Shift Register
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S-R Latch
D Latch
J-K Flip-Flop
Edge-Triggered D Type Flip-Flop
Counter
Sequential Logic Summary
Where to Next?
Logic Types
Boolean algebra and that logic applied to logic gates (from last week’s lectures) is described as ‘combinational logic’ because the outputs depend on the inputs.
The outputs are a function of the inputs that are present in given situations, such as a discrete diagram and they can be seen as a combination.
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Logic Types (2)
On their own, logic gates use combinational logic because the inputs are defined ‘at input’.
However, in the world of computer electronics the logic circuit outputs depend, not only on the current inputs, but on previous values of the inputs and output.
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Logic Types (3)
The extra factor is time and that implies that memory circuits are needed to store information about the previous history of the circuit.
Where an input is defined by the result of using other gates, the logic for the input (and subsequent result) becomes described as ‘sequential’ because the sequence resulting in using gates’ outputs to input other gates may make the results perform a specific function such as to effect an ‘add’, or move data content
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Logic Types (4)
So the sequential circuits are said to follow ‘sequential logic’ because they follow a predetermined sequence.
This logic could be seen as an extension to combinational logic.
There are many examples of sequential logic circuits, the common named types being ‘latches’ and ‘flip-flops’.
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Ingredients: Gates
What are latch and flip-flop circuits made of?
Gates: NAND and NOR gates, mostly, with NOT gates where required.
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Ingredients: Gates (2)
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NAND Gate J-K Flip-Flop Circuit
That CLK is an input for a clock signal – see Slide 9 – 16)
Ingredients: Gates (3)
J-K Flop Flops, D-type, R-S type…
J-K = Jack Kilby (????) Maybe not…
R-S = Reset – Set
D = Data (and some say ‘Delay’ instead)
T = Toggle
Output Q is just output, Qnext is a Clock Pulse
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Ingredients: Gates (4)
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NAND Gate S-R Latch Circuit (or RS Latch)
The R-S Flip Flop
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A Word or Two on the Clock
Look out! There could be a bit of ‘going off at a tangent’ required…
The next sequence of slides talk about using the clock pulse as a type of input to latches and flip flops – so I will digress to describe a computer processors internal clock. Here goes!
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CPU Clock
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When a computer clock is energised with electrical current its molecules vibrate to output a ‘clock pulse square wave’ that can be used as a trigger for flip-flops to open and close.
CPU Clock (2)
A computer system’s clock speed is measured as a frequency, usually expressed as a number of cycles per second.
A crystal oscillator controls clock speeds, using a sliver of quartz in a small tin container. As voltage is applied to the quartz, it begins to vibrate (oscillate) at a harmonic rate dictated by the shape and size of the crystal.
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CPU Clock (3)
The oscillations emanate from the crystal in the form of a current that alternates at the harmonic rate of the crystal. This alternating current is the clock signal.
A typical computer system runs millions of these cycles per second, so speed is measured in megahertz (MHz). (One hertz is equal to one cycle per second.)
A single cycle is the smallest element of time for the processor. Every action requires at least one cycle and usually multiple cycles.
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CPU Clock (4)
To transfer data to and from memory, for example, an 8086 chip needs four cycles plus wait states. (A wait state is a clock tick in which nothing happens to ensure that the processor isn’t getting ahead of the rest of the computer.)
A 286 ((80286) from the 1980s) needs only two cycles plus any wait states for the same transfer.
The time required to execute instructions also varies.
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CPU Clock (5)
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Clock Pulse Square Wave
CPU Clock (6)
If a CPU is described as having a ‘clock speed of 2.66 GigaHertz’ then one can assume that a square wave can be detected, from the quartz crystal on the chip, 2,660,000,000 times in a second, when electricity is passed through the crystal. (Around two billion, six hundred and sixty million times in a second.)
The internal logic gates can be opened and closed, by the wave signal, up to 2.66 billion times per second.
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CPU Clock (7)
So, instructions and data are passed through the integrated (transistor logic) circuits at a rate of 2,660 million times per second.
This was actually achieved, in Pentium 4 processors and similar, by having several clocks. A primary clock might run at, say, a reliable 50 MegaHertz, but then one or two ‘internal clocks’ allow the 50 MHz to be multiplied by a factor of their own clock speed to bring the processor speed to a claimed 2.6 GigaHertz, for example.
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What is a Latch?
An asynchronous latch is an electronic sequential logic circuit used to store information in an asynchronous arrangement. (Asynchronous: they have no Clock input.)
One latch can store one bit.
They change output state only in response to data input.
Essentially, they hold a bit value and it remains constant until new inputs force it to change. A type of single-bit stable storage.
(Note: some other latches do have clock inputs for timing changes.)
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What is a Flip-Flop?
As with latches, flip-flops are another example of a circuit employing sequential logic. A flip-flop can also be called a bistable gate. A type of single-bit storage but not as stable as a latch.
A basic flip-flop has two stable states. The flip-flop maintains its states indefinitely until an input pulse (a trigger from the clock) is received. If a trigger is received, the flip-flop outputs change their states according to defined rules, and remain in those states until another trigger is received.
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Flip-Flop Circuitry
A ‘flip-flop’ is a combination of gates that is so-called because its output can first flip one way and then flop back the other way.
Known inputs means you can be sure the result will be ‘flipped’.
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What is the Difference Between
a Latch and a Flip-Flop?
The main difference between a latch and flip-flop: latches are level-sensitive while flip-flops are edge-sensitive. Both might require the use of a clock signal and are used in sequential logic. (The clock on the latch is for synchronisation whereas the clock on the flip-flop may trigger a change in output.)
The differences are on the next page but, just so you know, they can be designed to mimic each other – certainly the D-types (D-type latch, similar to the D-type flip-flop.)
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What is the Difference Between
a Latch and a Flip-Flop? (2)
On the next slide, imagine a 1 or 0 input on the ‘D’ of each circuit.
The D can be seen as a ‘Data Input’.
The Q is either a 1 or 0, depending on the ‘D’, the clock, ‘C’, and the gates in the flip flop or latch.
The latch and flip flop happen to be triggered by the clock, and happen to have the same ‘Q’ for three clock pulses, but the flip flop’s ‘Q’ is changed by the clock cycles, while the latch changes twice, quickly – so you can imagine new data coming in on D to cause those two short squares after the first change…
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What is the Difference Between
a Latch and a Flip-Flop? (3)
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The behaviour is the same, unless the input
changes while the clock is high
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Flip Flop
Latch
What is the Difference Between
a Latch and a Flip-Flop? (4)
For a latch, the output tracks the input when the clock signal is high, so as long as the clock is logic 1 the output can change if the input also changes. (Logic 1 + new data = new output)
Flip-flops, in comparison, will store the input only when there is a rising/falling edge of the clock. (Edge-triggered, so may flip on clock pulses.)
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What is a Shift Register?
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.
They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.
Most of the registers possess no characteristic internal sequence of states. All the flip-flops are driven by a common clock, and all are set or reset simultaneously.
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What is a Counter?
In a the 4-bit counter, edge-triggered master-slave flip-flops are used. The output of each flip-flop changes state on the falling edge (1-to-0 transistion).
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SR (Set-Reset) Latch
Basic storage made from gates.
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S & R both 0 in “resting” state
Have to keep both from 1 at same time
The S-R Latch (2)
Cross-coupled NOR gates.
They can set (S=1, R=0) or reset (R=1, S=0) the output.
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R
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Reset
Set
S R Q
0 0 hold
0 1 0
1 0 1
1 1 disallow (Like ‘undefined’)
S R Latch
Similar to the previous one – this one is made from NANDs.
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D Latch
Two inputs:
the data value to be stored (D),
the clock signal (C) indicating when to read and store D.
Two outputs:
the value of the internal state (Q) and it’s complement.
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D Latch (2)
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Standard Symbols – Latches
The circle at input indicates negation (inversion).
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More on Flip-Flops
Sequential logic is used by (or caused by (?)) the flip-flop.
A simple flip-flop has two stable states. The flip-flop maintains its states indefinitely until an input pulse called a trigger is received. If a trigger is received, the flip-flop outputs change their states according to defined rules, and remain in those states until another trigger is received.
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More on Flip-Flops (2)
Flip-flop circuits are interconnected to form the logic circuits that comprise microprocessors (and RAM).
I.E. the logical and mathematical circuits of the CPUs Arithmetic and Logic Unit work by complex combinations of flip-flops and other logic gates.
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Flip-Flop Types
There are several different kinds of flip-flop circuits, with designators such as
R-S
J-K
D, and
T (a variation on the J-K).
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The R-S Flip Flop (Again)
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J-K Flip-Flop
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Edge-Triggered D Flip-Flop
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Edge-Triggered D Flip-Flop (2)
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Edge-Triggered D Flip-Flop (3)
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Edge-Triggered D Flip-Flop (4)
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Edge-Triggered D Flip-Flop (5)
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Edge-Triggered D Flip-Flop (6)
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Edge-Triggered D Flip-Flop (7)
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T Flip-Flop
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T Flip-Flop (2)
It’s full name is ‘Toggle’ flip-flop
The output toggles when input is asserted
If T=1, then Q Q’ when CLK
If T=0, then Q Q when CLK
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Input(t) Q(t) Q(t + t)
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(Back to) Shift Register
A shift register consists of a chain of bistables connected together so that data can be transferred (shifted) along the chain from one end to the other. The diagram shows a 4-bit shift register made from D-type bistables (Flip-flops).
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Shift Register (2)
First Clock input: on the first rising edge (Low to High transition) the logic state at the Serial input is transferred to A, the output of the first D-type flip-flop. Before this change the logic state at the D-input of the second D-type was Low (Logic 0). This 0 is transferred to B – no change in logic state.
When the next Clock pulse arrives, the Serial input and the D-input of the second D-type are both at Logic 1. Output A remains at 1 and output B becomes 1. Each new pulse transfers the Logic 1 signal to the next stage (the next flip-flop) of the shift register. The bits in each flip-flop get ‘shifted over by one’.
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Counter (Ring Counter)
Looking a lot like a shift register – and acting in a few similar ways, the 4-bit ring counter is also made up of four D-type flip-flops with a specific input-output arrangement – notably that the last Complement output is carried back to be the first serial input.
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Counter?
What are counters counting? They count events on a digital device. So they are often associated with keeping track of the events required for an instruction to be fetched and executed, for example, which may have a number of events – an instruction is not always executed ‘in one go’.
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Another Type of Counter
Another type of counter is the binary counter.
These use J-K flip-flops, taking the output of one cell to the Clock input of the next.
The J and K inputs of each flip-flop are set to 1 to produce a shift at each cycle of the Clock input. For each two shifts of the first flip-flop a shift is produced in the second flip-flop and so on down to the fourth flip-flop. This produces a binary number equal to the number of cycles of the input Clock signal.
Also known as a “ripple through” counter.
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Binary Counter
The effect of this counter is that, if A – D set to 0, then a 1 comes in on the left with a clock signal, it will move to D. Next clock signal there will be a 1 on C, a 0 on D. Next clock signal, a 1 on D and a 1 on C. After 15 inputs A, B, C and D will be 1111. It is a binary count!
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Latch and Flip-Flop Diagram Example
The circuit in this box could be a flip flop or a latch as it seems to have clock input, but not directly…
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Conclusion
Gates and inverters, the circuitry around them, flip-flops and latches are all very important to processors and internal memory. Why? Because that is what they are made up of.
Groups of flip-flops and gates can be arranged to cause logical operations or mathematical operations (for program instructions). Other flip-flops and latches can be grouped to store 1s and 0s (for data storage).
That is the magic of the modern computer!
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End of Sequential Logic
That describes a number of examples of sequential logic.
We went deep into some of the most fundamental features of integrated circuitry, and have seen many versions of flip-flops, latches and counters.
The working principles of logic gate combinations have shown how electronic signals can be managed to represent computational instructions and data.
Are there… ANY QUESTIONS?
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Where to Next?
NEXT WEEK:
The theme of the next lecture:
“Von Neumann Architecture”
What are the main aspects of von Neumann architecture? Why has it endured as a technical format for so long? We can look at these things next – see what all the fuss is about.
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Thanks for your attentiveness.
See you here next time. Be safe and well in the meantime.
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