10.1
(a) Let Vs increase by a positive increment. This will cause the drain current of Q1 to increase. The increase in Id1 will be fed to the Q3-Q4 mirror, which will provide a corresponding increase in the drain current of Q4. The latter current will cause the voltage at the output node to rise. A fraction of the increase in VO is applied through the divider (R1, R2) to the gate of Q2. The increase in the voltage of the gate of Q2 will subtract from the initially assumed increase of the voltage of the gate of Q1, resulting in a smaller increase in the differential voltage applied to the (Q1, Q2) pair. Thus, the feedback counter acts the originally assumed change, verifying that it is negative.
(b) The negative feedback will cause the dc voltage at the gate of Q2 to be approximately equal to the dc voltage at the gate of Q1, that is zero. Now, with VG2 =0, the dc current in R2 will be zero and similarly the dc current in R1 will be zero, resulting in VO= 0 V dc.
(c) Figure 1 shows the A circuit. It also shows how the loading effect of the β network on the A circuit, namely R11 and R22, are found. The gain of the A circuit can be written by inspection as:
A= gm1,2(ro2||ro4||R22) where: gm1,2 = 2ID1,2 VOV1,2
= 2×0.1 = 1 mA/V 0.2
|V| 10 ro2=ro4= A = =100kΩ
ID3,4 0.1 R22 = R1 + R2 = 1 MΩ
A=1(100||100||1000) = 47.62 V/V
1
(d)
V A 47.62
o =Af = →5= → β=0.179
V 1+Aβ 1+47.62β s
Thus, R2 =0.179 → R2 =0.179MΩ=179kΩ R1+R2
R1 =1000−179=821kΩ
(e) Refer to fig. 1:
Ro = R22||ro2||ro4 = 1000||100||100 = 47.62 kΩ
Rout = Ro = 47.62 1+Aβ 1+47.62×0.179
(f) With RL = 10 kΩ,
= 5 kΩ
V R 10 V
o = 5 × L = 5 × = 3.33
(g)
With RL = 10 kΩ:
A = gm1,2(RL||R22||ro2||ro4) = 1(10||1000||100||100) = 8.26 V/V Using β = 0.179, we obtain:
Af = 8.26 = 3.33 V/V 1+8.26×0.179
V R+R 10+5 V s L out
2
10.2:
(a) If Vs increases, the output of A1 will decrease and this will cause the output of A2 to increase. This, in turn, causes the output of A3 which is Vo, to increase. A portion of the positive increment in Vo is fed back to the positive input terminal of A1 through the voltage divider (R2, R1), the increased voltage at the positive input terminal of A1 counteracts the originally assumed increase at the negative input terminal, verifying that the feedback is negative.
(b)Af=1 ; where:β= R1
β R1+R2
Thus, to obtain an ideal closed-loop gain of 5 V/V we need β=0.2 →0.2= 20 20+R2
80 kΩ
(c)
Figure 1 shows the small signal equivalent circuit of the feedback amplifier.
(d)
→R2 =
Figure 2 shows the A circuit and the β circuit together with the determination of its loading effects, R11 and R22.
3
We can write:
V 82 V 1 = − = −0.766
V 82+9+16 V i
V =20V × 5 =12.195V 2 13.2+5 1
V = −20V (20||20) = −200V 322
V =V 1||100 =0.497V o 3 (1||100) + 1 3
Thus,
(e)β= 20 =0.2V ; 1+Aβ=1+928.5×0.2=186.7 20+80 V
(f)Af =Vo = A =928.5 =4.97V Vi 1+Aβ 186.7 V
(g)
From the A circuit:
Ri =9+82+16=107kΩ
Rif =Ri(1+Aβ)=107×186.7=19.98MΩ Rin =Rif −Rs =19.98MΩ
(h) From the A circuit:
RO = RL||R22||1kΩ = 1||100||1 = 497.5 Ω
ROf = RO =497.5=2.66Ω 1 + Aβ 186.7
ROf = Rout||RL → Rout||1000 = 2.66 Ω → Rout = 2.66 Ω
V
A≡ o =0.497×−200×12.195×−0.766=925.5V/V
V i
4
(i) fHf =fH(1+Aβ)=100×186.7=18.67kHz
(j) if A1 drops to half its nominal value, A will drop to half its nominal value:
A = 1 × 928.5 = 464.25 2
And Af becomes:
Af = 464.25 = 4.947 V/V
Thus, the percentage change in Af is
= 4.947−4.97 = −0.47% 4.97
1+464.25×0.2
5