CS计算机代考程序代写 x86 Operating Systems CMPSC 473

Operating Systems CMPSC 473
CPU/memory virtualization
January 28, 2021 – Lecture 4 Instructor: Bhuvan Urgaonkar

Administrative
• Project 1 released, due on Feb. 16
• Please start early and make good use of OHs
• Good luck!

Last Time: Traps
• Ondetectingtrap,CPUmust:
– Save process state
– Transfer control to trap handler (in OS) • CPU indexes trap vector by trap number
• Jumps to address
– Restore process state and resume

A Final Missing Piece!
• We would like the CPU to raise a trap when a process executes a privileged instruction but not when the OS executes it
• But how would the CPU know the difference between a process and the OS?
– An instruction is an instruction!

Dual CPU Mode
• CPUs offer at least two “modes” of operation
– User mode and OS/kernel mode
– Execute privileged instruction in user mode -> trap
– E.g., Mode bit provided by hardware
• ProvidesabilitytodistinguishwhenCPUisrunningprocessorOS
– E.g., x86 offers four modes called “rings” with ring 0 for OS and ring 3 for processes

Dual CPU Mode
• OS runs with the CPU in kernel mode
• OS responsible to ensure programs run with CPU in user mode
• What is required to realize the above?
– OS is the first software to run! – The booting up of the OS
– OS has the ability to change CPU mode from kernel to user
– Programs have the ability to change CPU mode from user to kernel