CSC 230: Assembly Language intro
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 1
Assembly Language intro
• Setting the stage
• MIPS32 model
• Machine operation
• Machine language
• MIPS assembly language, assembler
• More on the MIPS32 architecture’s ISA (or
Instruction Set Architecture)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 2
Setting the stage
• Inthiscoursewewillwritecomputerprogramsat the lowest possible level that is feasible for most programmers
• Thismeanswritingascloseaspossibletothelevel of machine instructions or opcodes
• Suchprogrammingissignificantlydifferentfrom coding in Java, Python, C, etc.
– We must provide much more detail to the computer in our program
– The kinds of details to be provided a very specific to the underlying computer’s instruction set architecture
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 3
“Lowest possible level for us…”
• The lowest possible level for us is not even low enough for the computer!
– We need tools to transform our programs and translate them into the lowest level (binary files)
– Without the binary file for a program, the computer cannot execute the program.
• Brief diversion: Hello, world! on a MacBook Pro
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 4
Hello, world!
$ ./hello
Hello, CSC 230 students!
$ ls –l hello
-rwxr-xr-x 1 zastre staff 8440 14 Jan 11:06 hello
$ file hello
hello: Mach-O 64-bit executable x86_64
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 5
Hello, world!
$ hexdump –C hello
0000000 cf fa ed fe 07 00 00 01 03 00 00 80 02 00 00 00
0000010 0f 00 00 00 b0 04 00 00 85 00 20 00 00 00 00 00
0000020 19 00 00 00 48 00 00 00 5f 5f 50 41 47 45 5a 45
0000030 52 4f 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0000040 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00
0000050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0000060 00 00 00 00 00 00 00 00 19 00 00 00 d8 01 00 00
0000070 5f 5f 54 45 58 54 00 00 00 00 00 00 00 00 00 00
0000080 00 00 00 00 01 00 00 00 00 10 00 00 00 00 00 00
0000090 00 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00
00000a0 07 00 00 00 05 00 00 00 05 00 00 00 00 00 00 00
00000b0 5f 5f 74 65 78 74 00 00 00 00 00 00 00 00 00 00
…
…
00020a0 00 00 00 00 00 00 00 00 02 00 00 00 03 00 00 00
00020b0 00 00 00 40 02 00 00 00 00 00 00 00 5f 5f 6d 68
00020c0 5f 65 78 65 63 75 74 65 5f 68 65 61 64 65 72 00
00020d0 5f 70 72 69 6e 74 66 00 64 79 6c 64 5f 73 74 75
00020e0 62 5f 62 69 6e 64 65 72 00 72 6CS1C 2360:4Com7p2uter3Aarchi2tecfture2afnd Assembly Language
University of Victoria
Assembly Language intro: Slide 6
00020f0 35 36 31 34 35 34 32 00
Department of Computer Science
Too low-level
• Working directly with binary files is very difficult
– Only rarely would we ourselves manually craft all of the binary sequences needed for a binary file
– Modifying such files in a manual way is nearly impossible
• That is why we depend upon so many other tools: they help generate binary files for us
– compilers, linkers
– bytecode compilers and virtual machines – assemblers
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 7
Assembler
• Aprogramthattranslatesfromhuman-readableand human–writeable machine code…
– … into binary files…
– … which are meant for execution on particular
computer architecture
• Tobeabletowriteaprogramusinganassembler, the programmer needs some knowledge of at least three things:
1. 2. 3.
the computer’s architecture
the computer’s ISA
coding conventions used by assembler
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 8
A brief taste of MIPS assembly
li $17, 4
li $18, 7
add $19, $17, $18 subi $19, $19, 1 move $20, $19
end:
li $v0, 1
syscall
1. Need to know architecture has 32 registers; later
will also learn registers
have a conventional
purpose (i.e., $v0 is the
same as $2)
2. Need to know what is meant by li, add, subi, mov and syscall, and what operands they require {ISA knowledge}.
3. Need to know that code-point
labels are defined with a
colon, and directly used by
control-flow instructions
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 9
University of Victoria
{assembler coding conventions}.
Department of Computer Science
A word to the wise…
• There is a bit of a chicken-and-egg problem here.
– The three kinds of knowledge are interrelated…
– … and so are little bits are learned simultaneously (which can feel confusing).
• Regardless, you have a big advantage here!
– You already know how to express computation in a higher-level language
– Acquiring that skill required some effort (it isn’t trivial!)
– That experience will help here.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 10
Place of CPU in computer system
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 11
Typical MIPS core components
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 12
A few observations
• Previous diagram shows a simplified view of the MIPS datapath
• Although not shown, the clock is connected to all sequential
components in CPU
– These components change state once per clock cycle
– instruction memory
– data memory
– register file
• Other combinational-logic parts do not need a clock
– These components change their outputs whenever the inputs
change
• Caches result in main memory separating into instruction memory and data memory (I-cache, D-cache)
– However, the same MIPS operations can be used to access instruction memory and data memory
– We will spend much more time later in the course looking at caches
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 13
1+1+1=?
• Let’s look at MIPS architecture in action • We will use this diagram format
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 14
1+1+1=?
Informally:
Store the value of 1 into
register 9.
Add the value in register 9
with value in register 9,
storing result in register
10.
Then add the value in
register 10 with value in
register 9, storing result
in register 10.
addi $9, $0, 1
add $10, $9, $9
add $10, $10, $9
Normal opcode convention with
three operands:
SOMEOP Rd, Rs, Rt
SOMEOP Rd, Rs, immediate
means
Rd = Rs SOMEOP Rt
Rd U=niverRsisty ofSViOctoMriEa OP immediate Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 15
Before start of first cycle
Instruction memory contains binary for opcodes. (We will eventually learn why these memory values corresponds to the previous slide.)
PC must start at some known address. We will see what this on the next slide.
Instruction Memory will make available the opcode/contents of instructions corresponding to address in the PC
CPU control will determine which registers are needed as source
University of Victoria
CSC 230: Computer Architecture and Assembly Language
operands, which register is the destination, and what operation is to be
Department of Computer Science
Assembly Language intro: Slide 16
performed by the ALU.
Instruction Fetch (IF) phase for instruction 1 At end of first cycle
add $9, $0, 1
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 17
Instruction Decode (ID) phase for instruction 1 At end of first cycle
add $9, $0, 1
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 18
Execute (EX) phase for instruction 1 At end of first cycle
add $9, $0, 1
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 19
Writeback (WB) phase for instruction 1 At end of first cycle
add $9, $0, 1
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 20
Instruction Fetch (IF) phase for instruction 2 At end of first cycle
add $10, $9, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 21
Instruction Fetch (ID) phase for instruction 2 At end of first cycle
add $10, $9, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 22
Execution (EX) phase for instruction 2 At end of first cycle
add $10, $9, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 23
Writeback (WB) phase for instruction 2 At end of first cycle
add $10, $9, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 24
Instruction Fetch (IF) phase for instruction 3 At end of first cycle
add $10, $10, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 25
Instruction Fetch (ID) phase for instruction 3 At end of first cycle
add $10, $10, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 26
Execution (EX) phase for instruction 3 At end of first cycle
add $10, $10, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 27
Writeback (WB) phase for instruction 3 At end of first cycle
add $10, $10, $9
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 28
More about MIPS32 architecture
• All instructions are 32-bits in length
– Recall:Thisiswhatwecallaword(i.e.,alsofourbytes)
– Thisthereforemeansthatprogrammemoryistreatedbythe processor as an array of words.
– Someinstructionscanhaveimmediatevaluesencodedwith them (assuming values are small enough).
• General purpose registers ($0 to $31)
– Eachstore32bits(i.e.,fourbytes)
– Datamanipulatedduringanyinstructionexecutioncycle must be in one of these registers!
• PC register is also 32-bits wide
– Note:Ina64-bitarchitecture(suchasMIPS64),thePCmust be 64 bits wide
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 29
MIPS32 basic address space
• 32-bit address space consists of four regions
• Our programs and our data will always appear in the bottom most “user space” area.
• (0x00400000 is well within the user area.)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 30
Further into machine language…
• As already indicated, each machine instruction:
– has an operation code (or opcode)
– has zero or more operands
• Operands are …
– … the data, or address of data, to be used in an operation
• Each machine instruction …
– … occupies some consecutive number of bytes (four bytes, aligned on four-byte address boundaries)
• Each machine program …
– … consists of a sequence of instructions stored in consecutive memory words
• The Program Counter (PC) ..
– … contains the address of the next instruction code to be fetched
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 31
Some examples: add, load, store
add Rd, Rr, Rs
add $10, $13, $12
add: add the contents of two registers into a third
Add contents of $13 with contents of $12, and store result in $10.
load: read from location in memory based on address in register + a constant offset
lw Rt, offset(Rs)
lw $20, 100($5)
Load the four-byte value stored an memory address ($5 + 100) into $20
store: copy the four bytes in Rs into memory word located at byte address stored in Rd
sw Rs, (Rd)
sw $19, ($4)
Store the four bytes in $19
into the memory address
indicated by the value in $4;
store with the endian order of
the implementation (i.e., in
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 32
MARS this is little-endian).
MIPS32 assembly-code control flow
• When trying to understand some specific conditional-branching code in assembly…
• …it is best to think in terms of flowcharts!
– This is because far more control-flow possibilities exist in assembly than in Java…
– … and so “thinking in Java” could be misleading.
• We must also separate out the action to test a condition from the branching action itself
– And sometimes the action is not even needed!
• (Note: Unlike many other computer
architectures, MIPS32 does not use condition
flags as part of its branching machinery.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 33
However…
• We need to get started somehow…
• So:
– Let us think forward from Java semantics into assembly semantics.
• But remember:
– Going the other way is sometimes impossible (i.e., from assembly semantics back into Java semantics).
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 34
Beware of several “gotchas”!
• Although you know how to work with variables in a higher-level language:
– Registers are not variables!
• Although you know how to work with control
flow in a higher-level language:
– There is no for loop (or while loop) instruction
in assembly!
– There is no if statement instruction in assembly!
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 35
Control-flow: if-then
• Sequential code is essential, but not powerful enough
• We would like to respond to changes of state in our machine.
– Do something only if a particular condition is true
• Our initial conditions are relatively primitive – Comparison of values in different registers
• Our logic is also reversed:
– In assembly, we implement our needed control flow by skipping over what we normally think of as the “true” block’s code!
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 36
if-then (example 1)
// Java: assume variables declared and assigned
// their values elsewhere in the program
if (counter != 0) { } sum=sum+1;
result = result + 5;
not_true1:
# Comments begin with the # symbol
# $8 : counter
# $9 : sum
# $10 : result
beq $8, $0, not_true1
addi $9, $9, 1
University of Victoria
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 37
Department of Computer Science
addi $10, $10, 5
if-then (example 1)
// Java: assume variables declared and assigned
// their values elsewhere in the program
if (height > threshold) {
} height = threshold;
result = result – 2;
not_true2:
# $8 : height
# $9 : threshold
# $10 : result
# $11 : temporary for comparison
slt $11, $9, $8
beq $11, $0, not_true2
add $8, $0, $9
University of Victoria
Department of Computer Science
addi $10, $10, -2
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 38
// Java: assume variables declared and assigned // their values elsewhere in the program
if-then (example 1)
if (height > threshold) {
} height = threshold; result = result – 2;
# $8 : height
# $9 : threshold
# $10 : result
# $11 : temporary for comparison
slt $11, $9, $8
beq $11, $0, not_true2
add $8, $0, $9
not_true2:
addi $10, $10, -2
Scenario 1: height = 10
threshold = 20
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 39
// Java: assume variables declared and assigned // their values elsewhere in the program
if-then (example 1)
if (height > threshold) {
} height = threshold; result = result – 2;
# $8 : height
# $9 : threshold
# $10 : result
# $11 : temporary for comparison
slt $11, $9, $8
beq $11, $0, not_true2
add $8, $0, $9
not_true2:
addi $10, $10, -2
Scenario 2: height = 20
threshold = 10
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 40
// Java: assume variables declared and assigned // their values elsewhere in the program
if-then (example 1)
if (height > threshold) {
} height = threshold; result = result – 2;
# $8 : height
# $9 : threshold
# $10 : result
# $11 : temporary for comparison
slt $11, $9, $8
beq $11, $0, not_true2
add $8, $0, $9
not_true2:
addi $10, $10, -2
Scenario 3: height = 15
threshold = 15
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 41
if-then-else example
if (a < b) {
target = a;
} else {
target = a + b;
}
a = b;
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 42
if (a < b) {
target = a;
If-then (example 1)
} else {
target = a + b;
}
a = b;
# $8 : a
# $9 : b
# $10 : target
# $11 : temporary for comparison
slt $11, $8, $9
beq $11, $0, else_branch
add $10, $0, $8
beq $0, $0, after_if
else_branch:
add $10, $8, $9
after_if:
add $8, $0, $9
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# out
Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 43
Loop example (Java syntax)
for (int counter = 100; counter > 0; counter–) {
someOperation();
}
// For this example, code below is equivalent…
for (int counter = 100; counter != 0; counter–) {
someOperation();
}
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 44
Loop example (Java syntax)
count = 100
// Equivalent…
for (int count = 100; count != 0; count = count – 1)
{
someOp();
}
someOp()
count = count – 1
in
count != 0
true
false
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 45
out
Another loop example (Java syntax)
count = 100
someOp()
count = count – 1
// Equivalent…
int count = 100;
do {someOp();
count = count – 1;
} while (count != 0);
in
true
University of Victoria Department of Computer Science
count != 0
false
out
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 46
A loop in assembly
# in
addi $16, $0, 10 loop1n:op
addi $16, $16, -1 bne $16, $0, loop1
end1:# out
# body of loop
# loop control
# loop control
bne causes the branch to be taken if the values of $16 and $0 (or zero) differ.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 47
Similar loop (but counting up instead)
# in
add $16, $0, $0
addi $17, $0, 10
loop2n:op # body of loop
addi $16, $16, 1 # loop control bne $16, $17, loop2 # loop control
end2:# out
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 48
Temporary summary on branches
• There are a large number of branch operations for supporting branching in MIPS32
• We have seen three so far:
– beq Rs, Rt,
Encoding
• ThedecodingstepiscentraltoaCPU’soperation… – … but what is encoding?
– The precise answer depends upon the architecture…
• Askedslightlydifferently:
– How is a MIPS32 instruction translated into a
machine instruction?
• Encodingisasteptakenbytheassembler
• Itconvertstheprogrammer’scodeintothe equivalent bit sequence for the processor that may be decoded by the processor.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 50
MIPS R-format instruction
Each instruction is stored in a word
(32-bits, or four contiguous bytes).
An instruction format is the result of paritioning these
CSC 230: Computer Architecture and Assembly Language
32 bitsUnivenrstityof Vdictiorsiajoint fields. The field shown here are
for an R-format instruction.
Assembly Language intro: Slide 51
Department of Computer Science
MIPS R-format instruction
add $10, $13, $12
op: All R-format instructions have 0 for this field
Rs, Rt: Register operands fields
Rd: Destination register fields
shamt: Shift amount (for bitwise operations, 0 otherwise) funct: ALU action (e.g., 32 = add, 34 = sub, 37 = nor, etc.)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 52
MIPS I-format instruction
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 53
op: All R-format instructions have 0 for this field
Rs: Source registers
Rt: Destination register (notice this isn’t called Rd!) constant or address: 16-bit value (i.e, from 0 to 65535)
lw $20, 100($5)
A few observations
• There is one more instruction form we will see – forjumpJ(whenwelookatsubroutines)
• Limiting instructions to three formats (R, I, and J) means:
– ControlwithinCPUissimplified
– Controlcircuitrycanbemadeveryfast
• One consequence:
– OperationsinsomemorecomplexISAsrequiringone instruction…
– …mayrequiredmultipleinstructionsinMIPS32
– (CISCvs.RISC)
– Notasbigadealasitmayseem,butstill,we’lllookat pseudo-instructions in two slides time…
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 54
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 55
Pseudo-instructions
• The MIPS32 ISA is very, very carefully designed
– RISC processor designers were able to start with a “blank slate”
– All MIPS32 instructions have the same size (32-bits / four bytes)
• Some of the instructions within other ISAs (e.g., Intel) do not exist in the MIPS32 core instructions because they would add undesirable complexity
– Example: There is no “load immediate” (where “immediate” can be 8 bits, 16 bits, or 32 bits long) in MIPS Core…
– … but these do exists (i.e., “MOV” in Intel x86).
• Some instructions within other ISAs do not exist in MIPS32 because they can be easily implement with an existing instruction
– Example: There is no “unconditional branch” in MIPS32 core
– Example: There is no “set on greater than” in MIPS32 core
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 56
Pseudo-instructions
• However!
– Programmers who come to MIPS32 from other architectures know and love these kinds of missing operations!
• Compromise: pseudo-instructions
– These do not belong to the MIPS 32 core…
– … but they are accepted as legitimate instructions with a specific syntax …
– … and are expanded at assembly-time into core instructions because they are “implemented” in standard MIPS assemblers.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 57
Pseudo-instructions
• For CSC 230:
– Students should focus on the basic operations (i.e., MIPS32 core)…
– … as otherwise it becomes very difficult to learn how to write a program in assembly (i.e., there are a very large number of pseudo- instructions).
– However…
– … there are a handful of standard tasks which are far easier to
write using pseudo-instructions • Examples:
– loading a 32-bit immediate into a general-purpose register (li)
– loading a 32-bit address into a general purpose register (la)
• You must follow instructions given for labs, assignments, and tests regarding what instructions are permitted to be used!
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 58
MIPS32 basic address space
Notice the three (!!)
different translations for
an “li” pseudo-instruction.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 59
Reading & writing from memory
• Recall that the MIPS architecture is a von Neumann architecture
– Theprogrammemoryanddatamemoryareinthesame address space
– However,theusualconventionistousedifferentpartsof address space for programs and for data
• Working with data memory therefore means knowing the conventions
– WewillusethecoreinstructionsimplementedinMIPS
– Ourfocuswillbeonreadingfrom,andwritingto, locations in data memory (.sdata which is also known as extern, .data, stack, heap)
– (Normallythe.textareaisreadonly;self-modifyingcodeis discouraged these days!)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 60
MIPS32 basic address space
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 61
Reading and writing to memory
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
la $10, sum
sw $13, 0($10)
• All loads from memory and stores to memory are indirect
– Memory location is the result of adding an offset and a register
• la: load address
– Assign a 32-bit address to a
register
– Pseudo-instruction
• lw: load word
– offset($register) version is part
of MIPS32 core • sw: store word
– offset($register) version is part of MIPS32 core
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 62
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 63
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 64
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 65
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 66
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 67
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 68
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 69
sw $13, 0($10)
MIPS32 basic address space
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
University of Victoria Department of Computer Science
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
CSC 230: Computer Architecture and Assembly Language la $10, sum Assembly Language intro: Slide 70
sw $13, 0($10)
Youduit.
.data
s: .word 21 w: .word 33 c: .word 14
.text
la $10, w
lw $11, -4($10)
lw $12, 4($10)
add $13, $11, $12
sw $13, 4($10)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 71
Load / store variants in MIPS32 core
• Although all general-purpose registers are 32-bits….
– …weoftenneedtoworkwithquantitiessmallerandlarger
• Smaller than 32-bits
– load/storebyte:lb,sb(8bits)
– load/storehalfword:lh,sb(16bits)
– Themeaningoftheseoperationsdependsuponendianness
• Larger than 32-bits
– Resultsofmultiplicationarestoredinhiddenregisters(i.e., 32-bit number * 32-bit number possibly 64-bits in size)
– Example:mult$10,$11
– Togetresultsfromabove:mfhi$13followedbymflo$12
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 72
Assembly language
• An assembler is simply a tool that automates the encodings required for opcodes and arguments
• An assembly-language programmer:
– Writesmachineinstructionsintheformofmnemonics..
– …andthenusestheassemblertocreatetheexecutable binary files
• In essence, the assembler acts as a fancy macro processor and address bookkeeper
– Keepstrackofhowmanybytesareneedforinstructions
– Whatregionsofmemoryaresetasideforspecificpurposes – Convertingourprogramlabelstoaddresses,etc.
• Machine instructions normally expressed using a somewhat-memorizable form known as a mnemonic
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 73
More example mnemonics
Set less than immediate
slti
Branch if less than or equal to zero
blez
Jump and link
jal
Trap is less then
tlt
Add unsigned
addu
Jump register unconditionally
jr
Square root single precision
sqrt.s
Branch if floating-point condition flag true
bc1t
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 74
Files normally involved with assembler
• Note: MARS eliminates a lot of steps normally associated with programming in MIPS32 assembly
– Thereforethedescriptionsbelowdescribewhatistruefor some other toolchains
• Assembler source-code file: extension is .asm – Forsometoolchains,theextensionis.s
• During assembly, two kinds of files may be created: – (MCUs)withextension.hex
– (CPUs)withextension.o
• These files contain machine code generated by assembler
– Toloadandruntheseonaspecificmachinemayrequire additional linking and loading steps.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 75
Assembler workflow
• An assembler translates the assembly-code program in several passes:
– Pass one: Convert .data symbols in addresses
– Pass two: Determine how each pseudo-instruction will be converted (into one machine instruction? into two?)
– Pass three: Convert .text labels into addresses
– Pass four: Use all of this information to generate
actual machine instructions
• Also (important!): assemblers are normally
case-insensitive (i.e., labels, mnemonics)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 76
Program
:
C
o
u
n
t
s
negative values in “deltas” area
U
CSC 230: Computer Architecture and Assembly Language
nive
rsi
ty
of
Vi
cto
Department of Computer Science
ria
Assembly Language intro: Slide 77
of data memory (values terminated with zero).
Before pass 1
Don’t need comments
Create blank symbol table
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 78
Pass 1
Determine known addresses in
data memory.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 79
Pass 1
Determine known addresses in
data memory.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 80
Pass 2
Determine pseudo instructions.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 81
Pass 2
Make the pseudo-instruction
translations, now have enough to
determine instruction addresses.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 82
Pass 3
Update symbol table by resolving
remaining unknown addresses.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 83
Pass 4
Encode instructions.
We’ll focus exclusively here on
the work needed to translate
branch offsets (i.e., there are
three branch instructions in this
code).
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 84
Typical MIPS core components
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 85
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language
bne at 0x004000014
Assembly Language intro: Slide 86
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language
beq at 0x004000018
Assembly Language intro: Slide 87
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language
beq at 0x004000024
Assembly Language intro: Slide 88
Final result of assembly as seen
in MARS.
Not shown here: The result of assembly that ensures
the .data area is given its initial values as shown
CSC 230: Computer Architecture and Assembly Language
in the original assembly code.
University of Victoria
Assembly Language intro: Slide 89
Department of Computer Science
Format of assembly source code
label:
[label:] instruction [operands] [comment]
[label:] directive [operands] [Comment]
comment
empty line
start: .space 48 # set aside 48 bytes in .data
# accessed with label ‘start’
.include “some-brilliant-code.asm”
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language # insert contents of sApssemcbliy Lfanigeuadge inftroi: Slidee 90
• Each line will take one of the following forms (items in braces are optional)
Directives
codes: .byte 13, 18, 21, 30 # four bytes with these
# four values
sevens:
maxint:
.byte 0x07, 7
.word 0x7ffffff
University of Victoria Department of Computer Science
# two versions of seven
# maximum 32-bit
CSC 230: Computer Architecture and Assembly Language # positiAvssemblny Luanmgbuaegerintro: Slide 91
• These give orders to the assembler:
– to set aside memory for variable data for the program
– to organize the overall memory for program
• Assembler takes direction from directives
• Examples: memory in global memory (“data”) having initial values
Directives
.text # everything following this is in the text segment
addi $16, $0, 0x0ade
.include “KT1230b.asm”
# Now we can use constants associated with usage of
# some device KT1230b
.data
buffer: .space 32 # 32 bytes start at nextAssaemvblay Lianlgauabgelinetro: Slide 92
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language
# address in data area
• Canalsodefineareasofprogram
• Includeheaderfilesaspartofsourcecode – Pre-defined constants
– other macros
• Setthememory-locationcounterforcurrent segment to a specific value
.text and .data can be “broken up”
• Recall that:
– .text informs the assembler that what follows is specific to the code section of the program
– .data informs the assembler that what follows is specific to the data section of the program
• The assembler maintains location counters for .text and .data
• Put differently:
– To understand the layout of our finished assembled file, we need much more than just the order of lines of assembly code…
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 93
Compare and contrast (same program!)
.data
sum: .space 4
a: .word 111
b: .word 235
.text
la $10, a
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
la $10, sum
sw $13, 0($10)
University of Victoria Department of Computer Science
.data
sum: .space 4 a: .word 111
.text
la $10, a
lw $11, 0($10)
la $10, b
lw $12, 0($10)
add $13, $11, $12
.data
b: .word 235
.text
la $10, sum
sw $13, 0($10)
CSC 230: Computer Architecture and Assembly Language
Assembly Language intro: Slide 94
A word about program termination
• When we execute a command on our computer (outside of MARS, that is) something like this very simplified sequence of events occurs:
a) Operating system (OS) reads in the complete machine-code program the command (i.e., executable file in the filesystem).
b) OS creates a process that contains the machine code (“text”)
c) OS sets the computer’s PC to address of the first instruction in the command’s machine code.
d) Computer executes instructions in machine code (may be many instructions, may be few…)
e) The last action taken by the program is a system call that is meant hand back control of the CPU to the OS.
f) OS now cleans up “garbage” from command execution
g) OS waits for the next command to be executed…
University of Victoria
CSC 230: Computer Architecture and Assembly Language
Department of Computer Science
Assembly Language intro: Slide 95
A word about program termination
• The simulator in MARS is a bit different from an OS
– It has your assembler code, and therefore knows when the program is supposed to “end”
• However:
– It is best to formgood habits!
– From now on we will terminate our programs by using a system call (even though it is not strictly needed by MARS)
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 96
MIPS system call
# Some MIPS operations…
# …
# And now we finished the program.
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 97
li $2, 10
University of Victoria
syscall
Department of Computer Science
• A real OS has dozens of system calls
– Opening / closing files, writing to network connections, sending
– The OS knows which system call to perform by looking at the contents of specific registers.
– (Normally the OS interface dictates which registers!).
• For MIPS:
– We must use register 2 ($2)
– The code for “exit from program” is decimal 10…
– … followed by the “syscall” MIPS instruction
signals to processes, etc. etc.
Assemblers
• We will cover additional bits of assembler syntax as needed…
• … but there is lots here to get you started
• Eventually it would be good to have:
– Macros…
– … and how to specify code for co-processor features….
– … but we won’t worry about these unless / until they are needed.
University of Victoria Department of Computer Science
CSC 230: Computer Architecture and Assembly Language Assembly Language intro: Slide 98