sch2sym -intstyle ise -family zynq -w -refsym simple_cpu_v1d /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/simple_cpu_v1d/Src/simple_cpu_v1d.sch /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/simple_cpu_v1d/simple_cpu_v1d.sym
sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl simple_cpu_v1d_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/Src/simple_cpu_v1d.sch
sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl simple_cpu_v1d_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/Src/simple_cpu_v1d.sch
sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl simple_cpu_v1d_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/Src/simple_cpu_v1d.sch
sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl simple_cpu_v1d_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/Src/simple_cpu_v1d.sch