PowerPoint Presentation
Slide 1
Computer System Organization and Architecture
Operating System Structures
& User Interface
Slide 2
Lecture Overview
In this lecture, we shall see:
◆ Storage Structure – Memory Hierarchy
◆ I/O Structure – How the I/O devices function?
◆ I/O Mechanisms (Polling, Interrupt Driven, DMA)
◆ Some General System Architectures
References:
Chapter # 1: Operating System Concepts (9th edition) by Silberschatz, Galvin & 3
Storage Structure – Main Memory
◆ CPU can load instructions only from memory
◼ Any programs to run must be stored there
◆ Memory is generally rewritable
◼ Main memory or (random-access memory)
◼ RAM is commonly implemented in a semiconductor
technology called Dynamic RAM (DRAM)
Slide 4
Storage Structure – Other forms of memory
◆ Read-only Memory (ROM)
◆ Electrically Erasable Programmable
ROM (EEPROM)
◆ ROM cannot be modified
◼ Suitable for bootstrap programs and game
cartridges(!)
◆ EEPROM can only be changed
infrequently
◼ Most smartphones store factory-bundled
programs on EEPROM
EEPROM
Slide 5
Storage Structure – How it works?
◆ Memory is an array of bytes
◼ Each byte has its own address
◼ Memory interaction via load/store instructions
◆ Load:
◼Moves a byte from main memory to an internal
register within the CPU
◆ Store:
◼Writing of a byte from CPU register to main memory
…
◆ CPU automatically loads instructions from
main memory for execution
Slide 6
architecture
◆ Fetch instruction – store in
instruction register
◼This is decoded, may cause
further operands to be fetched
and stored in another register
◼ Instruction is the executed –
result stored back into memory
◆ Memory unit only sees a
stream of addresses
Slide 7
In the perfect world …
◆ Programs and data would reside in main memory
◼This is difficult as the Main memory is small and volatile.
◆ Solution: Secondary storage which includes magnetic
disks, optical disks, tapes.
◼ Programs stored and loaded from here
◼ Many programs use the disk as both source and destination of
processing
◆Differences lie in speed, cost, size and volatility
Slide 8
Storage Comparison
Table of relative instances of memory and their associated speeds
from Silberschatz et al (2012)
& DRAM
Slide 9
Storage Hierarchy
Slide 10
Storage Hierarchy – another view
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Slide 11
I/O Structure
◆ Large portion of OS code dedicated to managing I/O
◆ Why is this important?
Slide 12
How does I/O Work?
◆ Recall: hardware may trigger an interrupt at any time
by sending a signal to the CPU.
◆ Devices interact via a device controller connected
through a common bus to the CPU
◆ Small Computer-Systems Interface (SCSI) controller
◼ Hardware (card or chip based) that allows SCSI storage devices to
communicate with the OS using an SCSI bus
Slide 13
How does I/O Work?
Slide 14
Device Controller
◆ Maintains some local buffer storage and a set of special-
purpose registers
◆ Device controller moves the data between the peripheral
devices that it controls and its local buffer storage
Slide 15
Device Driver
◆ Operating systems have a device
driver for each device controller.
These are typically downloaded!
◆ The device drivers understand the
device controller and provides the
rest of the OS with a uniform
interface to the device. This is the
same no matter the device.
Slide 16
I/O Mechanisms
Three types of I/O mechanisms are possible:
1) Programmed I/O (also known as Polling)
2) Interrupt Driven I/O
3) Direct Memory Access (DMA)
Slide 17
I/O Mechanisms – Programmed I/O
◆ Programmed I/O requires the
processor to “poll” the status of the
I/O module (controller)
◼ Processor sends the I/O request to I/O
module
◼ Processor checks whether I/O module is
finished?
◼ When I/O finished, data is transferred
between I/O modules, processor and
main memory.
Slide 18
I/O Mechanisms – Programmed I/O
◆ Processor has special instructions
◼ Control I/O device
◼ Test status
◼ Transfer of data (read/write)
◆ Performance Issues
◼ Processor is busy checking the I/O
status of the I/O module
Slide 19
I/O Mechanisms – Interrupt Driven I/O
◼ Interrupt driven I/O is fine for moving
small amounts of data
◼ Not really suitable for bulk data
movement, such as disk I/O
Slide 20
I/O Mechanisms – Direct Memory Access
◆ DMA controller transfers data directly from the I/O
device to memory
◼ Buffers, pointers and counters for the I/O device are setup
◼ Device controller transfers an entire block of data directly to or
from its own buffer storage to memory.
◆ No intervention by the CPU during transfer
Slide 21
Why DMA is preferable?
◆ Only a single interrupt is generated
◼Much better than one interrupt per byte generated for low-
speed devices
◆ So, the CPU is freed up to do other, perhaps more
interesting tasks!
◆ However, both DMA controller and processor share the
bus connecting different hardware components.
◼Processor will experience slowdown of processing during
DMA transfer, as it has to wait for getting access to the bus.
Slide 22
Computer System Architecture
◆ Single-Processor Systems
▪ One CPU – perhaps special purpose processors as well
◆Multiprocessor Systems
▪ Multicore systems
▪ Share bus, clock, memory and peripherals
Slide 23
Multiprocessor Systems – Advantages
◆ Increased throughput
◼ N more processors != Speed-up ratio N (