COMP2421 Computer Organization 2019/20 Semester 1
Lab 8 Logic Gate Design III
In this lab, we will examine sequential circuits and the following instantiations: ➢ SR-Latch
➢ SR-Flip Flop
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Sequential Circuit
A sequential circuit uses current input(s) and current state of the circuit to determine its output.
NOR Gate with Feedback
[Exercise] Create the following circuit using Logisim.
[Question] What is the error message?
COMP2421 Computer Organization 2019/20 Semester 1
Set-Reset (SR) Latch
A latch is an electronic logic circuit that has two inputs and one output. One of the inputs is called the SET (S) input; the other is called the RESET (S) input.
[Exercise] Create the following circuit using Logisim and fill in the results in the following table:
̅ SRQ𝐐 State
10 00 01 00 11
[Question] What are the roles of “Set” and “Reset”?
COMP2421 Computer Organization 2019/20 Semester 1
Clocked SR Flip-Flop
Events in digital computer are synchronized to a clock pulse, so that the inputs pass the gates when a clock pulse occurs. Below shows an implementation of clocked SR Flip-Flop:
[Exercise] Create the above circuit using Logisim. Use “Clock” under “Wiring” to create the clock pulse.
Fill in the results in the following table:
Clock S R Q
001 000 011 010 101 100 110 100 111
[Question] What is the role of flip-flop circuits in digital computers?
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