ISA Hardware Diagrams
ISA Hardware Diagrams
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Load-Store = Reg-Reg (MIPS, ARM)
Accumulator w/ DMA
MAR = Memory
Address Register
AC = Accumulator
Copy AC -> Mem
Mem -> ALU
Comparing the Number of Instructions
Accumulator: “B” comes from reg_file or data_mem
Loads copy mem->acc; stores copy acc->mem
“load-store” = ARM/MIPS-like
Code sequence for C = A + B for four classes of instruction sets:
Accumulator
GP Register
GP Register
(register-memory)
(load-store)
ADD C, A, B
Load R1,A
Load R2,B
Add R3,R1,R2
Store C,R3
Note: Code != cycle!!
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