The TLS & Tor Protocols Security & Networks • How it works • • Details of TLS • Common problems Tor • • • Anonymity on the internet The Tor Protocol Hidden servers Today’s Lecture 1. A 2. Na 3. {Na, Pay Elvis €5}Kab 1. A→B:A 2. B→A:Na 3. A → B : {Na, Pay […]
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Computer Architecture ELEC3441 Lecture 5 – Pipelining Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering RISC vs CISC – Iron Law CPUTime = # of instruction × # of cycle × time program instruction cycle L4 L5,6 HKUEEE ENGG3441 – HS 2 Microarchitecture CPI Cycle Time CISC >1 short RISC – single cycle
Computer Architecture ELEC3441 Lecture 6 – Branch Prediction + Interrupts Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering Why an Instruction may not be dispatched every cycle (CPI>1) § Full bypassing may be too expensive to implement – typically all frequently used paths are provided – some infrequently used bypass paths may increase
Computer Architecture ELEC3441 Instruction Set Architecture (1) 2nd Semester, 2020-21 Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering Review: ISA n Instruction set architecture defines the user observable behavior a processor • Acontractbetweenhardwareandsoftware n Usually includes: • Observablestateofaprocessor • Asetofmachineinstructions • Semanticsoftheinstructionandprocessor execution HKU EEE ELEC3441 – HS 2 Computer Architecture: HW/SW Interface
Computer Architecture ELEC3441 Lecture 10 – Virtual Memory Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering Physical Address Physical Address Bare Machine PC Inst. Cache D Decode E + M Data Cache W Physical Address Physical Address Memory Controller Main Memory (DRAM) § In a bare machine, the only kind of address is
Computer Architecture ELEC3441 Lecture 9 – Cache (2) Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering Causes of Cache Misses: The 3 C’s Compulsory: first reference to a line (a.k.a. cold start misses) – misses that would occur even with infinite cache Capacity: cache is too small to hold all data needed by
Computer Architecture ELEC3441 Computer Performance 2nd Semester, 2020-21 Dr. Hayden Kwok-Hay So Department of Electrical and Electronic Engineering University of Hong Kong How do you measure performance of a computer? How do you make a computer fast? HKU EEE ELEC3441 – HS 2 Ways to measure Performance Execution Time Throughput Time to finish a task
1 Introduction CS-UY 2214 — Project 3 Jeff Epstein This project represents a substantive programming exercise. Like all work for this class, it is to be completed individually: any form of collaboration is prohibited, as detailed in the syllabus. This project is considered a take-home exam. Before even reading this assignment, please read the E20
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Testing, and Debugging Some reflections from TAs in office hours regarding struggling students: ¡ñ ¡°I feel like they get stuck trying to figure it out by looking at their code instead of trying to get proactive and poke at their code¡± ¡ñ ¡°They’re checking that their code makes sense; sometimes they can’t see the bug
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Problem: Serial Optimization Practice Questions Rank the following in increasing order of how expensive they would be inside a loop (say, with a billion iterations and approximately 10 instructions). 1. A floating point add 2. Exp(x) 3. OpenMP critical region 4. A floating point divide 5. OpenMP atomic pragma Solution: A floating point add is
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