GPU

10: The OpenGL Pipeline 04: Memory, Queues, Barriers, Presentation COMP5822M: High Performance Graphics Overview Memory Management Host Memory Device Memory Shared (Mapped) Memory Buffers & Images Queues & Commands Data Movement COMP5822M: High Performance Graphics Host Memory Two choices Use the default allocator Good choice for small projects Create your own alloc()/realloc()/free() And pass function […]

10: The OpenGL Pipeline 20: Review COMP5822M: High Performance Graphics 01: Projective Pipeline How the projective pipeline actually works Locking queues or equivalent Passing information between stages Loops for each major stage The underlying design choices What data needs to move between stages And how it should be packaged COMP5822M: High Performance Graphics 02: GPU

This question paper consists of 2 printed pages each of which is identified by the Code COMP5822M   © UNIVERSITY OF LEEDS School of Computing August 2020 COMP5822M: High Performance Graphics Answer all questions. There are 100 marks in total. Submit a single PDF document with your answers. Aids: You may use any reference materials

10: The OpenGL Pipeline 02: Modern Pipeline & Architecture COMP5822M: High Performance Graphics GPUs Can be discrete or integrated Many levels, but all have custom silicon Hardware-software co-design For 35 years COMP5822M: High Performance Graphics GPU-Centric PC Architecture Core logic on motherboard Everything fed to CPU GPU connected over bus data transfer limited Batch transfer

This question paper consists of 2 printed pages each of which is identified by the Code COMP5822M   © UNIVERSITY OF LEEDS School of Computing May 2021 COMP5822M: High Performance Graphics Answer all questions. There are 100 marks in total. Submit a single PDF document with your answers. Aids: You may use any reference materials